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Unified Diff: src/mips64/assembler-mips64.cc

Issue 2313623002: MIPS: Implement MADD.S, MSUB, MADDF and MSUBF. (Closed)
Patch Set: Added blocks and unreachable sections. Created 4 years, 3 months ago
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Index: src/mips64/assembler-mips64.cc
diff --git a/src/mips64/assembler-mips64.cc b/src/mips64/assembler-mips64.cc
index 319e6b8b061f29e41c0b4068c4f64b976b317525..b35b166a2e3a1a75898d280d3ae7f412a70e5a53 100644
--- a/src/mips64/assembler-mips64.cc
+++ b/src/mips64/assembler-mips64.cc
@@ -2780,12 +2780,49 @@ void Assembler::mul_d(FPURegister fd, FPURegister fs, FPURegister ft) {
GenInstrRegister(COP1, D, ft, fs, fd, MUL_D);
}
+void Assembler::madd_s(FPURegister fd, FPURegister fr, FPURegister fs,
+ FPURegister ft) {
+ DCHECK(kArchVariant == kMips64r2);
+ GenInstrRegister(COP1X, fr, ft, fs, fd, MADD_S);
+}
void Assembler::madd_d(FPURegister fd, FPURegister fr, FPURegister fs,
FPURegister ft) {
+ DCHECK(kArchVariant == kMips64r2);
GenInstrRegister(COP1X, fr, ft, fs, fd, MADD_D);
}
+void Assembler::msub_s(FPURegister fd, FPURegister fr, FPURegister fs,
+ FPURegister ft) {
+ DCHECK(kArchVariant == kMips64r2);
+ GenInstrRegister(COP1X, fr, ft, fs, fd, MSUB_S);
+}
+
+void Assembler::msub_d(FPURegister fd, FPURegister fr, FPURegister fs,
+ FPURegister ft) {
+ DCHECK(kArchVariant == kMips64r2);
+ GenInstrRegister(COP1X, fr, ft, fs, fd, MSUB_D);
+}
+
+void Assembler::maddf_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+ DCHECK(kArchVariant == kMips64r6);
+ GenInstrRegister(COP1, S, ft, fs, fd, MADDF_S);
+}
+
+void Assembler::maddf_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+ DCHECK(kArchVariant == kMips64r6);
+ GenInstrRegister(COP1, D, ft, fs, fd, MADDF_D);
+}
+
+void Assembler::msubf_s(FPURegister fd, FPURegister fs, FPURegister ft) {
+ DCHECK(kArchVariant == kMips64r6);
+ GenInstrRegister(COP1, S, ft, fs, fd, MSUBF_S);
+}
+
+void Assembler::msubf_d(FPURegister fd, FPURegister fs, FPURegister ft) {
+ DCHECK(kArchVariant == kMips64r6);
+ GenInstrRegister(COP1, D, ft, fs, fd, MSUBF_D);
+}
void Assembler::div_s(FPURegister fd, FPURegister fs, FPURegister ft) {
GenInstrRegister(COP1, S, ft, fs, fd, DIV_D);
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