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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // A Disassembler object is used to disassemble a block of code instruction by | 5 // A Disassembler object is used to disassemble a block of code instruction by |
6 // instruction. The default implementation of the NameConverter object can be | 6 // instruction. The default implementation of the NameConverter object can be |
7 // overriden to modify register names or to do symbol lookup on addresses. | 7 // overriden to modify register names or to do symbol lookup on addresses. |
8 // | 8 // |
9 // The example below will disassemble a block of code and print it to stdout. | 9 // The example below will disassemble a block of code and print it to stdout. |
10 // | 10 // |
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911 return true; | 911 return true; |
912 } | 912 } |
913 | 913 |
914 | 914 |
915 void Decoder::DecodeTypeRegisterSRsType(Instruction* instr) { | 915 void Decoder::DecodeTypeRegisterSRsType(Instruction* instr) { |
916 if (!DecodeTypeRegisterRsType(instr)) { | 916 if (!DecodeTypeRegisterRsType(instr)) { |
917 switch (instr->FunctionFieldRaw()) { | 917 switch (instr->FunctionFieldRaw()) { |
918 case CVT_D_S: | 918 case CVT_D_S: |
919 Format(instr, "cvt.d.'t 'fd, 'fs"); | 919 Format(instr, "cvt.d.'t 'fd, 'fs"); |
920 break; | 920 break; |
| 921 case MADDF_S: |
| 922 Format(instr, "maddf.s 'fd, 'fs, 'ft"); |
| 923 break; |
| 924 case MSUBF_S: |
| 925 Format(instr, "msubf.s 'fd, 'fs, 'ft"); |
| 926 break; |
921 default: | 927 default: |
922 Format(instr, "unknown.cop1.'t"); | 928 Format(instr, "unknown.cop1.'t"); |
923 break; | 929 break; |
924 } | 930 } |
925 } | 931 } |
926 } | 932 } |
927 | 933 |
928 | 934 |
929 void Decoder::DecodeTypeRegisterDRsType(Instruction* instr) { | 935 void Decoder::DecodeTypeRegisterDRsType(Instruction* instr) { |
930 if (!DecodeTypeRegisterRsType(instr)) { | 936 if (!DecodeTypeRegisterRsType(instr)) { |
931 Format(instr, "unknown.cop1.'t"); | 937 switch (instr->FunctionFieldRaw()) { |
| 938 case MADDF_D: |
| 939 Format(instr, "maddf.d 'fd, 'fs, 'ft"); |
| 940 break; |
| 941 case MSUBF_D: |
| 942 Format(instr, "msubf.d 'fd, 'fs, 'ft"); |
| 943 break; |
| 944 default: |
| 945 Format(instr, "unknown.cop1.'t"); |
| 946 break; |
| 947 } |
932 } | 948 } |
933 } | 949 } |
934 | 950 |
935 | 951 |
936 void Decoder::DecodeTypeRegisterLRsType(Instruction* instr) { | 952 void Decoder::DecodeTypeRegisterLRsType(Instruction* instr) { |
937 switch (instr->FunctionFieldRaw()) { | 953 switch (instr->FunctionFieldRaw()) { |
938 case CVT_D_L: | 954 case CVT_D_L: |
939 Format(instr, "cvt.d.l 'fd, 'fs"); | 955 Format(instr, "cvt.d.l 'fd, 'fs"); |
940 break; | 956 break; |
941 case CVT_S_L: | 957 case CVT_S_L: |
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1353 break; | 1369 break; |
1354 case PS: | 1370 case PS: |
1355 UNIMPLEMENTED_MIPS(); | 1371 UNIMPLEMENTED_MIPS(); |
1356 break; | 1372 break; |
1357 default: | 1373 default: |
1358 UNREACHABLE(); | 1374 UNREACHABLE(); |
1359 } | 1375 } |
1360 break; | 1376 break; |
1361 case COP1X: | 1377 case COP1X: |
1362 switch (instr->FunctionFieldRaw()) { | 1378 switch (instr->FunctionFieldRaw()) { |
| 1379 case MADD_S: |
| 1380 Format(instr, "madd.s 'fd, 'fr, 'fs, 'ft"); |
| 1381 break; |
1363 case MADD_D: | 1382 case MADD_D: |
1364 Format(instr, "madd.d 'fd, 'fr, 'fs, 'ft"); | 1383 Format(instr, "madd.d 'fd, 'fr, 'fs, 'ft"); |
1365 break; | 1384 break; |
| 1385 case MSUB_S: |
| 1386 Format(instr, "msub.s 'fd, 'fr, 'fs, 'ft"); |
| 1387 break; |
| 1388 case MSUB_D: |
| 1389 Format(instr, "msub.d 'fd, 'fr, 'fs, 'ft"); |
| 1390 break; |
1366 default: | 1391 default: |
1367 UNREACHABLE(); | 1392 UNREACHABLE(); |
1368 } | 1393 } |
1369 break; | 1394 break; |
1370 case SPECIAL: | 1395 case SPECIAL: |
1371 DecodeTypeRegisterSPECIAL(instr); | 1396 DecodeTypeRegisterSPECIAL(instr); |
1372 break; | 1397 break; |
1373 case SPECIAL2: | 1398 case SPECIAL2: |
1374 DecodeTypeRegisterSPECIAL2(instr); | 1399 DecodeTypeRegisterSPECIAL2(instr); |
1375 break; | 1400 break; |
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1785 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); | 1810 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
1786 } | 1811 } |
1787 } | 1812 } |
1788 | 1813 |
1789 | 1814 |
1790 #undef UNSUPPORTED | 1815 #undef UNSUPPORTED |
1791 | 1816 |
1792 } // namespace disasm | 1817 } // namespace disasm |
1793 | 1818 |
1794 #endif // V8_TARGET_ARCH_MIPS | 1819 #endif // V8_TARGET_ARCH_MIPS |
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