MIPS: Implement MADD.S, MSUB, MADDF and MSUBF.

src/mips/constants-mips.h

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef  V8_MIPS_CONSTANTS_H_
 #define  V8_MIPS_CONSTANTS_H_
 #include "src/globals.h"
 // UNIMPLEMENTED_ macro for MIPS.
 #ifdef DEBUG
 #define UNIMPLEMENTED_MIPS()                                                  \
@@ skipping 507 matching lines @@
   ROUND_L_S = ((1U << 3) + 0),
   TRUNC_L_S = ((1U << 3) + 1),
   CEIL_L_S = ((1U << 3) + 2),
   FLOOR_L_S = ((1U << 3) + 3),
   ROUND_W_S = ((1U << 3) + 4),
   TRUNC_W_S = ((1U << 3) + 5),
   CEIL_W_S = ((1U << 3) + 6),
   FLOOR_W_S = ((1U << 3) + 7),
   RECIP_S = ((2U << 3) + 5),
   RSQRT_S = ((2U << 3) + 6),
+  MADDF_S = ((3U << 3) + 0),
+  MSUBF_S = ((3U << 3) + 1),
   CLASS_S = ((3U << 3) + 3),
   CVT_D_S = ((4U << 3) + 1),
   CVT_W_S = ((4U << 3) + 4),
   CVT_L_S = ((4U << 3) + 5),
   CVT_PS_S = ((4U << 3) + 6),
 
   // COP1 Encoding of Function Field When rs=D.
   ADD_D = ((0U << 3) + 0),
   SUB_D = ((0U << 3) + 1),
   MUL_D = ((0U << 3) + 2),
   DIV_D = ((0U << 3) + 3),
   SQRT_D = ((0U << 3) + 4),
   ABS_D = ((0U << 3) + 5),
   MOV_D = ((0U << 3) + 6),
   NEG_D = ((0U << 3) + 7),
   ROUND_L_D = ((1U << 3) + 0),
   TRUNC_L_D = ((1U << 3) + 1),
   CEIL_L_D = ((1U << 3) + 2),
   FLOOR_L_D = ((1U << 3) + 3),
   ROUND_W_D = ((1U << 3) + 4),
   TRUNC_W_D = ((1U << 3) + 5),
   CEIL_W_D = ((1U << 3) + 6),
   FLOOR_W_D = ((1U << 3) + 7),
   RECIP_D = ((2U << 3) + 5),
   RSQRT_D = ((2U << 3) + 6),
+  MADDF_D = ((3U << 3) + 0),
+  MSUBF_D = ((3U << 3) + 1),
   CLASS_D = ((3U << 3) + 3),
   MIN = ((3U << 3) + 4),
   MINA = ((3U << 3) + 5),
   MAX = ((3U << 3) + 6),
   MAXA = ((3U << 3) + 7),
   CVT_S_D = ((4U << 3) + 0),
   CVT_W_D = ((4U << 3) + 4),
   CVT_L_D = ((4U << 3) + 5),
   C_F_D = ((6U << 3) + 0),
   C_UN_D = ((6U << 3) + 1),
@@ skipping 46 matching lines @@
   CMP_SUGT = ((3U << 3) + 6),  // Reserved, not implemented.
   CMP_SOGT = ((3U << 3) + 7),  // Reserved, not implemented.
 
   SEL = ((2U << 3) + 0),
   MOVZ_C = ((2U << 3) + 2),
   MOVN_C = ((2U << 3) + 3),
   SELEQZ_C = ((2U << 3) + 4),  // COP1 on FPR registers.
   MOVF = ((2U << 3) + 1),      // Function field for MOVT.fmt and MOVF.fmt
   SELNEZ_C = ((2U << 3) + 7),  // COP1 on FPR registers.
   // COP1 Encoding of Function Field When rs=PS.
+
   // COP1X Encoding of Function Field.
+  MADD_S = ((4U << 3) + 0),
   MADD_D = ((4U << 3) + 1),
+  MSUB_S = ((5U << 3) + 0),
+  MSUB_D = ((5U << 3) + 1),
 
   // PCREL Encoding of rt Field.
   ADDIUPC = ((0U << 2) + 0),
   LWPC = ((0U << 2) + 1),
   AUIPC = ((3U << 3) + 6),
   ALUIPC = ((3U << 3) + 7),
 
   // POP66 Encoding of rs Field.
   JIC = ((0U << 5) + 0),
 
@@ skipping 598 matching lines @@
       }
   }
 }
 
 #undef OpcodeToBitNumber
 #undef FunctionFieldToBitNumber
 }  // namespace internal
 }  // namespace v8
 
 #endif    // #ifndef V8_MIPS_CONSTANTS_H_