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Issue 23112016: Drop unused rdtsc instruction. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 4 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1222 current += PrintRightXMMOperand(current); 1222 current += PrintRightXMMOperand(current);
1223 1223
1224 } else if (opcode == 0x29) { 1224 } else if (opcode == 0x29) {
1225 // movaps xmm/m128, xmm 1225 // movaps xmm/m128, xmm
1226 int mod, regop, rm; 1226 int mod, regop, rm;
1227 get_modrm(*current, &mod, &regop, &rm); 1227 get_modrm(*current, &mod, &regop, &rm);
1228 AppendToBuffer("movaps "); 1228 AppendToBuffer("movaps ");
1229 current += PrintRightXMMOperand(current); 1229 current += PrintRightXMMOperand(current);
1230 AppendToBuffer(", %s", NameOfXMMRegister(regop)); 1230 AppendToBuffer(", %s", NameOfXMMRegister(regop));
1231 1231
1232 } else if (opcode == 0xA2 || opcode == 0x31) { 1232 } else if (opcode == 0xA2) {
1233 // RDTSC or CPUID 1233 // CPUID
1234 AppendToBuffer("%s", mnemonic); 1234 AppendToBuffer("%s", mnemonic);
1235 1235
1236 } else if ((opcode & 0xF0) == 0x40) { 1236 } else if ((opcode & 0xF0) == 0x40) {
1237 // CMOVcc: conditional move. 1237 // CMOVcc: conditional move.
1238 int condition = opcode & 0x0F; 1238 int condition = opcode & 0x0F;
1239 const InstructionDesc& idesc = cmov_instructions[condition]; 1239 const InstructionDesc& idesc = cmov_instructions[condition];
1240 byte_size_operand_ = idesc.byte_size_operation; 1240 byte_size_operand_ = idesc.byte_size_operation;
1241 current += PrintOperands(idesc.mnem, idesc.op_order_, current); 1241 current += PrintOperands(idesc.mnem, idesc.op_order_, current);
1242 1242
1243 } else if (opcode == 0x57) { 1243 } else if (opcode == 0x57) {
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1287 1287
1288 // Mnemonics for two-byte opcode instructions starting with 0x0F. 1288 // Mnemonics for two-byte opcode instructions starting with 0x0F.
1289 // The argument is the second byte of the two-byte opcode. 1289 // The argument is the second byte of the two-byte opcode.
1290 // Returns NULL if the instruction is not handled here. 1290 // Returns NULL if the instruction is not handled here.
1291 const char* DisassemblerX64::TwoByteMnemonic(byte opcode) { 1291 const char* DisassemblerX64::TwoByteMnemonic(byte opcode) {
1292 switch (opcode) { 1292 switch (opcode) {
1293 case 0x1F: 1293 case 0x1F:
1294 return "nop"; 1294 return "nop";
1295 case 0x2A: // F2/F3 prefix. 1295 case 0x2A: // F2/F3 prefix.
1296 return "cvtsi2s"; 1296 return "cvtsi2s";
1297 case 0x31:
1298 return "rdtsc";
1299 case 0x51: // F2 prefix. 1297 case 0x51: // F2 prefix.
1300 return "sqrtsd"; 1298 return "sqrtsd";
1301 case 0x58: // F2 prefix. 1299 case 0x58: // F2 prefix.
1302 return "addsd"; 1300 return "addsd";
1303 case 0x59: // F2 prefix. 1301 case 0x59: // F2 prefix.
1304 return "mulsd"; 1302 return "mulsd";
1305 case 0x5C: // F2 prefix. 1303 case 0x5C: // F2 prefix.
1306 return "subsd"; 1304 return "subsd";
1307 case 0x5E: // F2 prefix. 1305 case 0x5E: // F2 prefix.
1308 return "divsd"; 1306 return "divsd";
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1865 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { 1863 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) {
1866 fprintf(f, " "); 1864 fprintf(f, " ");
1867 } 1865 }
1868 fprintf(f, " %s\n", buffer.start()); 1866 fprintf(f, " %s\n", buffer.start());
1869 } 1867 }
1870 } 1868 }
1871 1869
1872 } // namespace disasm 1870 } // namespace disasm
1873 1871
1874 #endif // V8_TARGET_ARCH_X64 1872 #endif // V8_TARGET_ARCH_X64
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