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Issue 230473005: ARM: Do not set FPSCR when converting to clamped uint8 (Closed) Base URL: git://github.com/v8/v8.git@master
Patch Set: Created 6 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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789 str(src2, dst2, cond); 789 str(src2, dst2, cond);
790 } 790 }
791 } 791 }
792 } 792 }
793 793
794 794
795 void MacroAssembler::VFPEnsureFPSCRState(Register scratch) { 795 void MacroAssembler::VFPEnsureFPSCRState(Register scratch) {
796 // If needed, restore wanted bits of FPSCR. 796 // If needed, restore wanted bits of FPSCR.
797 Label fpscr_done; 797 Label fpscr_done;
798 vmrs(scratch); 798 vmrs(scratch);
799 if (emit_debug_code()) {
800 tst(scratch, Operand(kVFPRoundingModeMask));
801 Assert(eq, kDefaultRoundingModeNotSet);
802 }
799 tst(scratch, Operand(kVFPDefaultNaNModeControlBit)); 803 tst(scratch, Operand(kVFPDefaultNaNModeControlBit));
800 b(ne, &fpscr_done); 804 b(ne, &fpscr_done);
801 orr(scratch, scratch, Operand(kVFPDefaultNaNModeControlBit)); 805 orr(scratch, scratch, Operand(kVFPDefaultNaNModeControlBit));
802 vmsr(scratch); 806 vmsr(scratch);
803 bind(&fpscr_done); 807 bind(&fpscr_done);
804 } 808 }
805 809
806 810
807 void MacroAssembler::VFPCanonicalizeNaN(const DwVfpRegister dst, 811 void MacroAssembler::VFPCanonicalizeNaN(const DwVfpRegister dst,
808 const DwVfpRegister src, 812 const DwVfpRegister src,
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3793 3797
3794 3798
3795 void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) { 3799 void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) {
3796 Usat(output_reg, 8, Operand(input_reg)); 3800 Usat(output_reg, 8, Operand(input_reg));
3797 } 3801 }
3798 3802
3799 3803
3800 void MacroAssembler::ClampDoubleToUint8(Register result_reg, 3804 void MacroAssembler::ClampDoubleToUint8(Register result_reg,
3801 DwVfpRegister input_reg, 3805 DwVfpRegister input_reg,
3802 LowDwVfpRegister double_scratch) { 3806 LowDwVfpRegister double_scratch) {
3803 Label above_zero;
3804 Label done; 3807 Label done;
3805 Label in_bounds;
3806 3808
3807 VFPCompareAndSetFlags(input_reg, 0.0); 3809 // Handle inputs >= 255 (including +infinity).
3808 b(gt, &above_zero); 3810 Vmov(double_scratch, 255.0, result_reg);
3811 mov(result_reg, Operand(255));
3812 VFPCompareAndSetFlags(input_reg, double_scratch);
3813 b(ge, &done);
3809 3814
3810 // Double value is less than zero, NaN or Inf, return 0. 3815 if (emit_debug_code()) {
jbramley 2014/04/09 14:18:26 I'd be tempted to omit this, since everything else
oetuaho-nv 2014/04/09 14:24:32 Yes, I thought about leaving this out too, but thi
rmcilroy 2014/04/09 15:53:30 This may be the only place vcvt uses the fpscr's r
3811 mov(result_reg, Operand::Zero()); 3816 vmrs(result_reg);
3812 b(al, &done); 3817 tst(result_reg, Operand(kVFPRoundingModeMask));
3818 Assert(eq, kDefaultRoundingModeNotSet);
3819 }
3820 // vcvt_u32_f64 agrees with what ClampDoubleToUint8 should do as long as
3821 // value in input_reg < 255.
rmcilroy 2014/04/09 15:53:30 nit - "For inputs < 255 (including negative) vcvt_
3822 vcvt_u32_f64(double_scratch.low(), input_reg, kFPSCRRounding);
3823 vmov(result_reg, double_scratch.low());
3813 3824
3814 // Double value is >= 255, return 255.
3815 bind(&above_zero);
3816 Vmov(double_scratch, 255.0, result_reg);
3817 VFPCompareAndSetFlags(input_reg, double_scratch);
3818 b(le, &in_bounds);
3819 mov(result_reg, Operand(255));
3820 b(al, &done);
3821
3822 // In 0-255 range, round and truncate.
3823 bind(&in_bounds);
3824 // Save FPSCR.
3825 vmrs(ip);
3826 // Set rounding mode to round to the nearest integer by clearing bits[23:22].
3827 bic(result_reg, ip, Operand(kVFPRoundingModeMask));
3828 vmsr(result_reg);
3829 vcvt_s32_f64(double_scratch.low(), input_reg, kFPSCRRounding);
3830 vmov(result_reg, double_scratch.low());
3831 // Restore FPSCR.
3832 vmsr(ip);
3833 bind(&done); 3825 bind(&done);
3834 } 3826 }
3835 3827
3836 3828
3837 void MacroAssembler::Throw(BailoutReason reason) { 3829 void MacroAssembler::Throw(BailoutReason reason) {
3838 Label throw_start; 3830 Label throw_start;
3839 bind(&throw_start); 3831 bind(&throw_start);
3840 #ifdef DEBUG 3832 #ifdef DEBUG
3841 const char* msg = GetBailoutReason(reason); 3833 const char* msg = GetBailoutReason(reason);
3842 if (msg != NULL) { 3834 if (msg != NULL) {
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4098 sub(result, result, Operand(dividend)); 4090 sub(result, result, Operand(dividend));
4099 } 4091 }
4100 if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift())); 4092 if (ms.shift() > 0) mov(result, Operand(result, ASR, ms.shift()));
4101 add(result, result, Operand(dividend, LSR, 31)); 4093 add(result, result, Operand(dividend, LSR, 31));
4102 } 4094 }
4103 4095
4104 4096
4105 } } // namespace v8::internal 4097 } } // namespace v8::internal
4106 4098
4107 #endif // V8_TARGET_ARCH_ARM 4099 #endif // V8_TARGET_ARCH_ARM
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