Index: src/compiler/instruction.cc |
diff --git a/src/compiler/instruction.cc b/src/compiler/instruction.cc |
index b992e3612b90229d6dff4a516cc815e52256d497..2f37075f9b786eea8c06c314633ee59aac590a6c 100644 |
--- a/src/compiler/instruction.cc |
+++ b/src/compiler/instruction.cc |
@@ -68,17 +68,15 @@ bool InstructionOperand::InterferesWith(const InstructionOperand& that) const { |
return EqualsCanonicalized(that); |
} |
-void InstructionOperand::Print(std::ostream& os, |
- const RegisterConfiguration* config) const { |
+void InstructionOperand::Print(const RegisterConfiguration* config) const { |
+ OFStream os(stdout); |
PrintableInstructionOperand wrapper; |
wrapper.register_configuration_ = config; |
wrapper.op_ = *this; |
os << wrapper << std::endl; |
} |
-void InstructionOperand::Print(std::ostream& os) const { |
- Print(os, GetRegConfig()); |
-} |
+void InstructionOperand::Print() const { Print(GetRegConfig()); } |
std::ostream& operator<<(std::ostream& os, |
const PrintableInstructionOperand& printable) { |
@@ -201,8 +199,8 @@ std::ostream& operator<<(std::ostream& os, |
return os; |
} |
-void MoveOperands::Print(std::ostream& os, |
- const RegisterConfiguration* config) const { |
+void MoveOperands::Print(const RegisterConfiguration* config) const { |
+ OFStream os(stdout); |
PrintableInstructionOperand wrapper; |
wrapper.register_configuration_ = config; |
wrapper.op_ = destination(); |
@@ -211,7 +209,7 @@ void MoveOperands::Print(std::ostream& os, |
os << wrapper << std::endl; |
} |
-void MoveOperands::Print(std::ostream& os) const { Print(os, GetRegConfig()); } |
+void MoveOperands::Print() const { Print(GetRegConfig()); } |
std::ostream& operator<<(std::ostream& os, |
const PrintableMoveOperands& printable) { |
@@ -316,15 +314,15 @@ bool Instruction::AreMovesRedundant() const { |
return true; |
} |
-void Instruction::Print(std::ostream& os, |
- const RegisterConfiguration* config) const { |
+void Instruction::Print(const RegisterConfiguration* config) const { |
+ OFStream os(stdout); |
PrintableInstruction wrapper; |
wrapper.instr_ = this; |
wrapper.register_configuration_ = config; |
os << wrapper << std::endl; |
} |
-void Instruction::Print(std::ostream& os) const { Print(os, GetRegConfig()); } |
+void Instruction::Print() const { Print(GetRegConfig()); } |
std::ostream& operator<<(std::ostream& os, |
const PrintableParallelMove& printable) { |
@@ -632,6 +630,58 @@ static InstructionBlock* InstructionBlockFor(Zone* zone, |
return instr_block; |
} |
+std::ostream& operator<<(std::ostream& os, |
+ PrintableInstructionBlock& printable_block) { |
+ const InstructionBlock* block = printable_block.block_; |
+ const RegisterConfiguration* config = printable_block.register_configuration_; |
+ const InstructionSequence* code = printable_block.code_; |
+ |
+ os << "B" << block->rpo_number(); |
+ os << ": AO#" << block->ao_number(); |
+ if (block->IsDeferred()) os << " (deferred)"; |
+ if (!block->needs_frame()) os << " (no frame)"; |
+ if (block->must_construct_frame()) os << " (construct frame)"; |
+ if (block->must_deconstruct_frame()) os << " (deconstruct frame)"; |
+ if (block->IsLoopHeader()) { |
+ os << " loop blocks: [" << block->rpo_number() << ", " << block->loop_end() |
+ << ")"; |
+ } |
+ os << " instructions: [" << block->code_start() << ", " << block->code_end() |
+ << ")" << std::endl |
+ << " predecessors:"; |
+ |
+ for (RpoNumber pred : block->predecessors()) { |
+ os << " B" << pred.ToInt(); |
+ } |
+ os << std::endl; |
+ |
+ for (const PhiInstruction* phi : block->phis()) { |
+ PrintableInstructionOperand printable_op = {config, phi->output()}; |
+ os << " phi: " << printable_op << " ="; |
+ for (int input : phi->operands()) { |
+ os << " v" << input; |
+ } |
+ os << std::endl; |
+ } |
+ |
+ ScopedVector<char> buf(32); |
+ PrintableInstruction printable_instr; |
+ printable_instr.register_configuration_ = config; |
+ for (int j = block->first_instruction_index(); |
+ j <= block->last_instruction_index(); j++) { |
+ // TODO(svenpanne) Add some basic formatting to our streams. |
+ SNPrintF(buf, "%5d", j); |
+ printable_instr.instr_ = code->InstructionAt(j); |
+ os << " " << buf.start() << ": " << printable_instr << std::endl; |
+ } |
+ |
+ for (RpoNumber succ : block->successors()) { |
+ os << " B" << succ.ToInt(); |
+ } |
+ os << std::endl; |
+ return os; |
+} |
+ |
InstructionBlocks* InstructionSequence::InstructionBlocksFor( |
Zone* zone, const Schedule* schedule) { |
InstructionBlocks* blocks = zone->NewArray<InstructionBlocks>(1); |
@@ -875,71 +925,28 @@ void InstructionSequence::SetSourcePosition(const Instruction* instr, |
source_positions_.insert(std::make_pair(instr, value)); |
} |
-void InstructionSequence::Print(std::ostream& os, |
- const RegisterConfiguration* config) const { |
+void InstructionSequence::Print(const RegisterConfiguration* config) const { |
+ OFStream os(stdout); |
PrintableInstructionSequence wrapper; |
wrapper.register_configuration_ = config; |
wrapper.sequence_ = this; |
os << wrapper << std::endl; |
} |
-void InstructionSequence::Print(std::ostream& os) const { |
- Print(os, GetRegConfig()); |
-} |
+void InstructionSequence::Print() const { Print(GetRegConfig()); } |
-void InstructionSequence::PrintBlock(std::ostream& os, |
- const RegisterConfiguration* config, |
+void InstructionSequence::PrintBlock(const RegisterConfiguration* config, |
int block_id) const { |
+ OFStream os(stdout); |
RpoNumber rpo = RpoNumber::FromInt(block_id); |
const InstructionBlock* block = InstructionBlockAt(rpo); |
CHECK(block->rpo_number() == rpo); |
- |
- os << "B" << block->rpo_number(); |
- os << ": AO#" << block->ao_number(); |
- if (block->IsDeferred()) os << " (deferred)"; |
- if (!block->needs_frame()) os << " (no frame)"; |
- if (block->must_construct_frame()) os << " (construct frame)"; |
- if (block->must_deconstruct_frame()) os << " (deconstruct frame)"; |
- if (block->IsLoopHeader()) { |
- os << " loop blocks: [" << block->rpo_number() << ", " << block->loop_end() |
- << ")"; |
- } |
- os << " instructions: [" << block->code_start() << ", " << block->code_end() |
- << ")\n predecessors:"; |
- |
- for (RpoNumber pred : block->predecessors()) { |
- os << " B" << pred.ToInt(); |
- } |
- os << "\n"; |
- |
- for (const PhiInstruction* phi : block->phis()) { |
- PrintableInstructionOperand printable_op = {config, phi->output()}; |
- os << " phi: " << printable_op << " ="; |
- for (int input : phi->operands()) { |
- os << " v" << input; |
- } |
- os << "\n"; |
- } |
- |
- ScopedVector<char> buf(32); |
- PrintableInstruction printable_instr; |
- printable_instr.register_configuration_ = config; |
- for (int j = block->first_instruction_index(); |
- j <= block->last_instruction_index(); j++) { |
- // TODO(svenpanne) Add some basic formatting to our streams. |
- SNPrintF(buf, "%5d", j); |
- printable_instr.instr_ = InstructionAt(j); |
- os << " " << buf.start() << ": " << printable_instr << "\n"; |
- } |
- |
- for (RpoNumber succ : block->successors()) { |
- os << " B" << succ.ToInt(); |
- } |
- os << "\n"; |
+ PrintableInstructionBlock printable_block = {config, block, this}; |
+ os << printable_block << std::endl; |
} |
-void InstructionSequence::PrintBlock(std::ostream& os, int block_id) const { |
- PrintBlock(os, GetRegConfig(), block_id); |
+void InstructionSequence::PrintBlock(int block_id) const { |
+ PrintBlock(GetRegConfig(), block_id); |
} |
FrameStateDescriptor::FrameStateDescriptor( |
@@ -1022,8 +1029,11 @@ std::ostream& operator<<(std::ostream& os, |
it != code.constants_.end(); ++i, ++it) { |
os << "CST#" << i << ": v" << it->first << " = " << it->second << "\n"; |
} |
+ PrintableInstructionBlock printable_block = { |
+ printable.register_configuration_, nullptr, printable.sequence_}; |
for (int i = 0; i < code.InstructionBlockCount(); i++) { |
- printable.sequence_->PrintBlock(os, printable.register_configuration_, i); |
+ printable_block.block_ = code.InstructionBlockAt(RpoNumber::FromInt(i)); |
+ os << printable_block; |
} |
return os; |
} |