Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(252)

Unified Diff: tests_lit/llvm2ice_tests/store.ll

Issue 2301303003: [SubZero] Implement load and store for MIPS (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« src/IceInstMIPS32.h ('K') | « tests_lit/llvm2ice_tests/load.ll ('k') | no next file » | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: tests_lit/llvm2ice_tests/store.ll
diff --git a/tests_lit/llvm2ice_tests/store.ll b/tests_lit/llvm2ice_tests/store.ll
index c1d027511ebe54ec5d095d0faf487452fad567be..282fb7aaa65b6f668ed7513d27f03f184c036646 100644
--- a/tests_lit/llvm2ice_tests/store.ll
+++ b/tests_lit/llvm2ice_tests/store.ll
@@ -56,7 +56,7 @@ entry:
}
; MIPS32-LABEL: store_i16
; MIPS32: li
-; MIPS32: sw
+; MIPS32: sh
define internal void @store_i8(i32 %addr_arg) {
entry:
@@ -71,4 +71,34 @@ entry:
}
; MIPS32-LABEL: store_i8
; MIPS32: li
-; MIPS32: sw
+; MIPS32: sb
+
+define internal void @store_f32(float* %faddr_arg) {
+entry:
+ store float 1.000000e+00, float* %faddr_arg, align 4
+ ret void
+
+; CHECK: Initial CFG
+; CHECK: entry:
+; CHECK-NEXT: store float 1.000000e+00, float* %faddr_arg, align 4
+; CHECK-NEXT: ret void
+}
+; MIPS32-LABEL: store_f32
+; MIPS32: lui
+; MIPS32: lwc1
+; MIPS32: swc1
+
+define internal void @store_f64(double* %daddr_arg) {
+entry:
+ store double 1.000000e+00, double* %daddr_arg, align 8
+ ret void
+
+; CHECK: Initial CFG
+; CHECK: entry:
+; CHECK-NEXT: store double 1.000000e+00, double* %daddr_arg, align 8
+; CHECK-NEXT: ret void
+}
+; MIPS32-LABEL: store_f64
+; MIPS32: lui
+; MIPS32: ldc1
+; MIPS32: sdc1
« src/IceInstMIPS32.h ('K') | « tests_lit/llvm2ice_tests/load.ll ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698