[SubZero] Implement load and store for MIPS

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 631 matching lines @@
     return;
   assert(getSrcSize() == 1 || getSrcSize() == 2);
   Ostream &Str = Func->getContext()->getStrDump();
   Variable *Dest = getDest();
   Variable *DestHi = getDestHi();
   Dest->dump(Func);
   if (DestHi) {
     Str << ", ";
     DestHi->dump(Func);
   }
-
   dumpOpcode(Str, " = mov", getDest()->getType());
   Str << " ";
-
   dumpSources(Func);
 }
 
 void InstMIPS32Mov::emitMultiDestSingleSource(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *DestLo = getDest();
   Variable *DestHi = getDestHi();
   auto *Src = llvm::cast<Variable>(getSrc(0));
@@ skipping 38 matching lines @@
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
   Operand *Src = getSrc(0);
   auto *SrcV = llvm::dyn_cast<Variable>(Src);
 
   assert(!llvm::isa<Constant>(Src));
 
   const char *ActualOpcode = nullptr;
   const bool DestIsReg = Dest->hasReg();
-  const bool DestIsMem = !Dest->hasReg();
   const bool SrcIsReg = (SrcV && SrcV->hasReg());
-  const bool SrcIsMem = !(SrcV && SrcV->hasReg());
 
   // reg to reg
   if (DestIsReg && SrcIsReg) {
     switch (Dest->getType()) {
     case IceType_f32:
       ActualOpcode = "mov.s";
       break;
     case IceType_f64:
       ActualOpcode = "mov.d";
       break;
     case IceType_i1:
     case IceType_i8:
     case IceType_i16:
     case IceType_i32:
       Str << "\t"
-             "move"
-             "\t";
+          << "move"
+          << "\t";
       getDest()->emit(Func);
       Str << ", ";
       getSrc(0)->emit(Func);
       return;
     default:
       UnimplementedError(getFlags());
       return;
     }
 
     assert(ActualOpcode);
     Str << "\t" << ActualOpcode << "\t";
     getDest()->emit(Func);
     Str << ", ";
     getSrc(0)->emit(Func);
     return;
   }
 
-  // reg to stack
-  if (DestIsMem && SrcIsReg) {
-    switch (Dest->getType()) {
-    case IceType_f32:
-      ActualOpcode = "swc1";
-      break;
-    case IceType_f64:
-      ActualOpcode = "sdc1";
-      break;
-    case IceType_i1:
-    case IceType_i8:
-    case IceType_i16:
-    case IceType_i32:
-      ActualOpcode = "sw";
-      break;
-    default:
-      UnimplementedError(getFlags());
-      return;
-    }
-
-    assert(ActualOpcode);
-    Str << "\t" << ActualOpcode << "\t";
-    getSrc(0)->emit(Func);
-    Str << ", ";
-    getDest()->emit(Func);
-    return;
-  }
-
-  // stack to reg
-  if (DestIsReg && SrcIsMem) {
-    switch (Dest->getType()) {
-    case IceType_f32:
-      ActualOpcode = "lwc1";
-      break;
-    case IceType_f64:
-      ActualOpcode = "ldc1";
-      break;
-    case IceType_i1:
-    case IceType_i8:
-    case IceType_i16:
-    case IceType_i32:
-      ActualOpcode = "lw";
-      break;
-    default:
-      UnimplementedError(getFlags());
-      return;
-    }
-
-    assert(ActualOpcode);
-    Str << "\t" << ActualOpcode << "\t";
-    getDest()->emit(Func);
-    Str << ", ";
-    getSrc(0)->emit(Func);
-    return;
-  }
-
-  // stack to stack
-  llvm::report_fatal_error("mov cant copy stack to stack.");
+  llvm::report_fatal_error("Invalid mov instruction. Dest or Src is memory.");
 }
 
 template <> void InstMIPS32Addiu::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->addiu(getDest(), getSrc(0), Imm);
 }
 
 template <> void InstMIPS32Slti::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->slti(getDest(), getSrc(0), Imm);
@@ skipping 75 matching lines @@
 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
   ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());
   uint32_t Imm = static_cast<uint32_t>(Offset->getValue());
   Asm->lw(getDest(), Mem->getBase(), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice