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Side by Side Diff: src/mips/constants-mips.h

Issue 228943009: MIPS: Add big-endian support for MIPS. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Comments addressed Created 6 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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48 #ifdef _MIPS_ARCH_MIPS32R2 48 #ifdef _MIPS_ARCH_MIPS32R2
49 static const ArchVariants kArchVariant = kMips32r2; 49 static const ArchVariants kArchVariant = kMips32r2;
50 #elif _MIPS_ARCH_LOONGSON 50 #elif _MIPS_ARCH_LOONGSON
51 // The loongson flag refers to the LOONGSON architectures based on MIPS-III, 51 // The loongson flag refers to the LOONGSON architectures based on MIPS-III,
52 // which predates (and is a subset of) the mips32r2 and r1 architectures. 52 // which predates (and is a subset of) the mips32r2 and r1 architectures.
53 static const ArchVariants kArchVariant = kLoongson; 53 static const ArchVariants kArchVariant = kLoongson;
54 #else 54 #else
55 static const ArchVariants kArchVariant = kMips32r1; 55 static const ArchVariants kArchVariant = kMips32r1;
56 #endif 56 #endif
57 57
58 enum Endianness {
59 kLittle,
60 kBig
61 };
62
63 #if defined(V8_TARGET_LITTLE_ENDIAN)
64 static const Endianness kArchEndian = kLittle;
65 #elif defined(V8_TARGET_BIG_ENDIAN)
66 static const Endianness kArchEndian = kBig;
67 #else
68 #error Unknown endianness
69 #endif
58 70
59 #if(defined(__mips_hard_float) && __mips_hard_float != 0) 71 #if(defined(__mips_hard_float) && __mips_hard_float != 0)
60 // Use floating-point coprocessor instructions. This flag is raised when 72 // Use floating-point coprocessor instructions. This flag is raised when
61 // -mhard-float is passed to the compiler. 73 // -mhard-float is passed to the compiler.
62 const bool IsMipsSoftFloatABI = false; 74 const bool IsMipsSoftFloatABI = false;
63 #elif(defined(__mips_soft_float) && __mips_soft_float != 0) 75 #elif(defined(__mips_soft_float) && __mips_soft_float != 0)
64 // This flag is raised when -msoft-float is passed to the compiler. 76 // This flag is raised when -msoft-float is passed to the compiler.
65 // Although FPU is a base requirement for v8, soft-float ABI is used 77 // Although FPU is a base requirement for v8, soft-float ABI is used
66 // on soft-float systems with FPU kernel emulation. 78 // on soft-float systems with FPU kernel emulation.
67 const bool IsMipsSoftFloatABI = true; 79 const bool IsMipsSoftFloatABI = true;
68 #else 80 #else
69 const bool IsMipsSoftFloatABI = true; 81 const bool IsMipsSoftFloatABI = true;
70 #endif 82 #endif
71 83
84 #if defined(V8_TARGET_LITTLE_ENDIAN)
85 const uint32_t kHoleNanUpper32Offset = 4;
86 const uint32_t kHoleNanLower32Offset = 0;
87 #elif defined(V8_TARGET_BIG_ENDIAN)
88 const uint32_t kHoleNanUpper32Offset = 0;
89 const uint32_t kHoleNanLower32Offset = 4;
90 #else
91 #error Unknown endianness
92 #endif
72 93
73 // Defines constants and accessor classes to assemble, disassemble and 94 // Defines constants and accessor classes to assemble, disassemble and
74 // simulate MIPS32 instructions. 95 // simulate MIPS32 instructions.
75 // 96 //
76 // See: MIPS32 Architecture For Programmers 97 // See: MIPS32 Architecture For Programmers
77 // Volume II: The MIPS32 Instruction Set 98 // Volume II: The MIPS32 Instruction Set
78 // Try www.cs.cornell.edu/courses/cs3410/2008fa/MIPS_Vol2.pdf. 99 // Try www.cs.cornell.edu/courses/cs3410/2008fa/MIPS_Vol2.pdf.
79 100
80 namespace v8 { 101 namespace v8 {
81 namespace internal { 102 namespace internal {
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811 // JS argument slots size. 832 // JS argument slots size.
812 const int kJSArgsSlotsSize = 0 * Instruction::kInstrSize; 833 const int kJSArgsSlotsSize = 0 * Instruction::kInstrSize;
813 // Assembly builtins argument slots size. 834 // Assembly builtins argument slots size.
814 const int kBArgsSlotsSize = 0 * Instruction::kInstrSize; 835 const int kBArgsSlotsSize = 0 * Instruction::kInstrSize;
815 836
816 const int kBranchReturnOffset = 2 * Instruction::kInstrSize; 837 const int kBranchReturnOffset = 2 * Instruction::kInstrSize;
817 838
818 } } // namespace v8::internal 839 } } // namespace v8::internal
819 840
820 #endif // #ifndef V8_MIPS_CONSTANTS_H_ 841 #endif // #ifndef V8_MIPS_CONSTANTS_H_
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