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1 // Copyright 2006-2009 the V8 project authors. All rights reserved. | 1 // Copyright 2006-2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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99 "bx r3 \n\t" | 99 "bx r3 \n\t" |
100 ".THUMB \n" | 100 ".THUMB \n" |
101 "2: \n\t" | 101 "2: \n\t" |
102 : "=r" (beg) | 102 : "=r" (beg) |
103 : "0" (beg), "r" (end), "r" (flg), "r" (__ARM_NR_cacheflush) | 103 : "0" (beg), "r" (end), "r" (flg), "r" (__ARM_NR_cacheflush) |
104 : "r3"); | 104 : "r3"); |
105 #endif | 105 #endif |
106 #endif | 106 #endif |
107 } | 107 } |
108 | 108 |
109 | |
110 void CPU::DebugBreak() { | |
111 #if !defined (__arm__) | |
112 UNIMPLEMENTED(); // when building ARM emulator target | |
113 #else | |
114 asm volatile("bkpt 0"); | |
115 #endif | |
116 } | |
117 | |
118 } } // namespace v8::internal | 109 } } // namespace v8::internal |
119 | 110 |
120 #endif // V8_TARGET_ARCH_ARM | 111 #endif // V8_TARGET_ARCH_ARM |
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