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Side by Side Diff: src/opts/SkBlitRow_opts_mips_dsp.cpp

Issue 2289293002: clean up use of register storage class (Closed)
Patch Set: Created 4 years, 3 months ago
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1 /* 1 /*
2 * Copyright 2014 The Android Open Source Project 2 * Copyright 2014 The Android Open Source Project
3 * 3 *
4 * Use of this source code is governed by a BSD-style license that can be 4 * Use of this source code is governed by a BSD-style license that can be
5 * found in the LICENSE file. 5 * found in the LICENSE file.
6 */ 6 */
7 7
8 #include "SkBlitRow.h" 8 #include "SkBlitRow.h"
9 #include "SkBlitMask.h" 9 #include "SkBlitMask.h"
10 #include "SkColorPriv.h" 10 #include "SkColorPriv.h"
11 #include "SkDither.h" 11 #include "SkDither.h"
12 #include "SkMathPriv.h" 12 #include "SkMathPriv.h"
13 13
14 static void S32_D565_Blend_mips_dsp(uint16_t* SK_RESTRICT dst, 14 static void S32_D565_Blend_mips_dsp(uint16_t* SK_RESTRICT dst,
15 const SkPMColor* SK_RESTRICT src, int count, 15 const SkPMColor* SK_RESTRICT src, int count,
16 U8CPU alpha, int /*x*/, int /*y*/) { 16 U8CPU alpha, int /*x*/, int /*y*/) {
17 register uint32_t t0, t1, t2, t3, t4, t5, t6; 17 uint32_t t0, t1, t2, t3, t4, t5, t6;
18 register uint32_t s0, s1, s2, s4, s5, s6; 18 uint32_t s0, s1, s2, s4, s5, s6;
19 19
20 alpha += 1; 20 alpha += 1;
21 if (count >= 2) { 21 if (count >= 2) {
22 __asm__ volatile ( 22 __asm__ volatile (
23 ".set push \n\t" 23 ".set push \n\t"
24 ".set noreorder \n\t" 24 ".set noreorder \n\t"
25 "sll %[s4], %[alpha], 8 \n\t" 25 "sll %[s4], %[alpha], 8 \n\t"
26 "or %[s4], %[s4], %[alpha] \n\t" 26 "or %[s4], %[s4], %[alpha] \n\t"
27 "repl.ph %[s5], 0x1f \n\t" 27 "repl.ph %[s5], 0x1f \n\t"
28 "repl.ph %[s6], 0x3f \n\t" 28 "repl.ph %[s6], 0x3f \n\t"
(...skipping 82 matching lines...) Expand 10 before | Expand all | Expand 10 after
111 __asm__ volatile ( 111 __asm__ volatile (
112 "pref 0, 0(%[src]) \n\t" 112 "pref 0, 0(%[src]) \n\t"
113 "pref 1, 0(%[dst]) \n\t" 113 "pref 1, 0(%[dst]) \n\t"
114 "pref 0, 32(%[src]) \n\t" 114 "pref 0, 32(%[src]) \n\t"
115 "pref 1, 32(%[dst]) \n\t" 115 "pref 1, 32(%[dst]) \n\t"
116 : 116 :
117 : [src]"r"(src), [dst]"r"(dst) 117 : [src]"r"(src), [dst]"r"(dst)
118 : "memory" 118 : "memory"
119 ); 119 );
120 120
121 register int32_t t0, t1, t2, t3, t4, t5, t6; 121 int32_t t0, t1, t2, t3, t4, t5, t6;
122 register int32_t t7, t8, t9, s0, s1, s2, s3; 122 int32_t t7, t8, t9, s0, s1, s2, s3;
123 const uint16_t dither_scan = gDitherMatrix_3Bit_16[(y) & 3]; 123 const uint16_t dither_scan = gDitherMatrix_3Bit_16[(y) & 3];
124 124
125 if (count >= 2) { 125 if (count >= 2) {
126 __asm__ volatile ( 126 __asm__ volatile (
127 ".set push \n\t" 127 ".set push \n\t"
128 ".set noreorder \n\t" 128 ".set noreorder \n\t"
129 "li %[s1], 0x01010101 \n\t" 129 "li %[s1], 0x01010101 \n\t"
130 "li %[s2], -2017 \n\t" 130 "li %[s2], -2017 \n\t"
131 "1: \n\t" 131 "1: \n\t"
132 "bnez %[s3], 4f \n\t" 132 "bnez %[s3], 4f \n\t"
(...skipping 126 matching lines...) Expand 10 before | Expand all | Expand 10 after
259 } 259 }
260 dst += 1; 260 dst += 1;
261 DITHER_INC_X(x); 261 DITHER_INC_X(x);
262 } 262 }
263 } 263 }
264 264
265 static void S32_D565_Opaque_Dither_mips_dsp(uint16_t* __restrict__ dst, 265 static void S32_D565_Opaque_Dither_mips_dsp(uint16_t* __restrict__ dst,
266 const SkPMColor* __restrict__ src, 266 const SkPMColor* __restrict__ src,
267 int count, U8CPU alpha, int x, int y ) { 267 int count, U8CPU alpha, int x, int y ) {
268 uint16_t dither_scan = gDitherMatrix_3Bit_16[(y) & 3]; 268 uint16_t dither_scan = gDitherMatrix_3Bit_16[(y) & 3];
269 register uint32_t t0, t1, t2, t3, t4, t5; 269 uint32_t t0, t1, t2, t3, t4, t5;
270 register uint32_t t6, t7, t8, t9, s0; 270 uint32_t t6, t7, t8, t9, s0;
271 int dither[4]; 271 int dither[4];
272 int i; 272 int i;
273 273
274 for (i = 0; i < 4; i++, x++) { 274 for (i = 0; i < 4; i++, x++) {
275 dither[i] = (dither_scan >> ((x & 3) << 2)) & 0xF; 275 dither[i] = (dither_scan >> ((x & 3) << 2)) & 0xF;
276 } 276 }
277 277
278 __asm__ volatile ( 278 __asm__ volatile (
279 ".set push \n\t" 279 ".set push \n\t"
280 ".set noreorder \n\t" 280 ".set noreorder \n\t"
(...skipping 87 matching lines...) Expand 10 before | Expand all | Expand 10 after
368 SkPMColorAssert(c); // only if DEBUG is turned on 368 SkPMColorAssert(c); // only if DEBUG is turned on
369 SkASSERT(SkGetPackedA32(c) == 255); 369 SkASSERT(SkGetPackedA32(c) == 255);
370 unsigned dither = DITHER_VALUE(x); 370 unsigned dither = DITHER_VALUE(x);
371 *dst++ = SkDitherRGB32To565(c, dither); 371 *dst++ = SkDitherRGB32To565(c, dither);
372 } 372 }
373 } 373 }
374 374
375 static void S32_D565_Blend_Dither_mips_dsp(uint16_t* dst, 375 static void S32_D565_Blend_Dither_mips_dsp(uint16_t* dst,
376 const SkPMColor* src, 376 const SkPMColor* src,
377 int count, U8CPU alpha, int x, int y) { 377 int count, U8CPU alpha, int x, int y) {
378 register int32_t t0, t1, t2, t3, t4, t5, t6; 378 int32_t t0, t1, t2, t3, t4, t5, t6;
379 register int32_t s0, s1, s2, s3; 379 int32_t s0, s1, s2, s3;
380 register int x1 = 0; 380 int x1 = 0;
381 register uint32_t sc_mul; 381 uint32_t sc_mul;
382 register uint32_t sc_add; 382 uint32_t sc_add;
383 #ifdef ENABLE_DITHER_MATRIX_4X4 383 #ifdef ENABLE_DITHER_MATRIX_4X4
384 const uint8_t* dither_scan = gDitherMatrix_3Bit_4X4[(y) & 3]; 384 const uint8_t* dither_scan = gDitherMatrix_3Bit_4X4[(y) & 3];
385 #else // ENABLE_DITHER_MATRIX_4X4 385 #else // ENABLE_DITHER_MATRIX_4X4
386 const uint16_t dither_scan = gDitherMatrix_3Bit_16[(y) & 3]; 386 const uint16_t dither_scan = gDitherMatrix_3Bit_16[(y) & 3];
387 #endif // ENABLE_DITHER_MATRIX_4X4 387 #endif // ENABLE_DITHER_MATRIX_4X4
388 int dither[4]; 388 int dither[4];
389 389
390 for (int i = 0; i < 4; i++) { 390 for (int i = 0; i < 4; i++) {
391 dither[i] = (dither_scan >> ((x & 3) << 2)) & 0xF; 391 dither[i] = (dither_scan >> ((x & 3) << 2)) & 0xF;
392 x += 1; 392 x += 1;
(...skipping 147 matching lines...) Expand 10 before | Expand all | Expand 10 after
540 __asm__ volatile ( 540 __asm__ volatile (
541 "pref 0, 0(%[src]) \n\t" 541 "pref 0, 0(%[src]) \n\t"
542 "pref 1, 0(%[dst]) \n\t" 542 "pref 1, 0(%[dst]) \n\t"
543 "pref 0, 32(%[src]) \n\t" 543 "pref 0, 32(%[src]) \n\t"
544 "pref 1, 32(%[dst]) \n\t" 544 "pref 1, 32(%[dst]) \n\t"
545 : 545 :
546 : [src]"r"(src), [dst]"r"(dst) 546 : [src]"r"(src), [dst]"r"(dst)
547 : "memory" 547 : "memory"
548 ); 548 );
549 549
550 register uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8; 550 uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8;
551 register uint32_t t16; 551 uint32_t t16;
552 register uint32_t add_x10 = 0x100010; 552 uint32_t add_x10 = 0x100010;
553 register uint32_t add_x20 = 0x200020; 553 uint32_t add_x20 = 0x200020;
554 register uint32_t sa = 0xff00ff; 554 uint32_t sa = 0xff00ff;
555 555
556 __asm__ volatile ( 556 __asm__ volatile (
557 ".set push \n\t" 557 ".set push \n\t"
558 ".set noreorder \n\t" 558 ".set noreorder \n\t"
559 "blez %[count], 1f \n\t" 559 "blez %[count], 1f \n\t"
560 " nop \n\t" 560 " nop \n\t"
561 "2: \n\t" 561 "2: \n\t"
562 "beqz %[count], 1f \n\t" 562 "beqz %[count], 1f \n\t"
563 " nop \n\t" 563 " nop \n\t"
564 "addiu %[t0], %[count], -1 \n\t" 564 "addiu %[t0], %[count], -1 \n\t"
(...skipping 86 matching lines...) Expand 10 before | Expand all | Expand 10 after
651 if (c) { 651 if (c) {
652 *dst = SkSrcOver32To16(c, *dst); 652 *dst = SkSrcOver32To16(c, *dst);
653 } 653 }
654 dst += 1; 654 dst += 1;
655 } 655 }
656 } 656 }
657 657
658 static void S32A_D565_Blend_mips_dsp(uint16_t* SK_RESTRICT dst, 658 static void S32A_D565_Blend_mips_dsp(uint16_t* SK_RESTRICT dst,
659 const SkPMColor* SK_RESTRICT src, int count , 659 const SkPMColor* SK_RESTRICT src, int count ,
660 U8CPU alpha, int /*x*/, int /*y*/) { 660 U8CPU alpha, int /*x*/, int /*y*/) {
661 register uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8, t9; 661 uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8, t9;
662 register uint32_t s0, s1, s2, s3; 662 uint32_t s0, s1, s2, s3;
663 register unsigned dst_scale = 0; 663 unsigned dst_scale = 0;
664 664
665 __asm__ volatile ( 665 __asm__ volatile (
666 ".set push \n\t" 666 ".set push \n\t"
667 ".set noreorder \n\t" 667 ".set noreorder \n\t"
668 "replv.qb %[t0], %[alpha] \n\t" 668 "replv.qb %[t0], %[alpha] \n\t"
669 "repl.ph %[t6], 0x80 \n\t" 669 "repl.ph %[t6], 0x80 \n\t"
670 "repl.ph %[t7], 0xFF \n\t" 670 "repl.ph %[t7], 0xFF \n\t"
671 "1: \n\t" 671 "1: \n\t"
672 "addiu %[t8], %[count], -1 \n\t" 672 "addiu %[t8], %[count], -1 \n\t"
673 "blez %[t8], 2f \n\t" 673 "blez %[t8], 2f \n\t"
(...skipping 84 matching lines...) Expand 10 before | Expand all | Expand 10 after
758 unsigned db = (SkPacked32ToB16(sc) * alpha) + (SkGetPackedB16(dc) * dst_scale); 758 unsigned db = (SkPacked32ToB16(sc) * alpha) + (SkGetPackedB16(dc) * dst_scale);
759 *dst = SkPackRGB16(SkDiv255Round(dr), SkDiv255Round(dg), SkDiv255Rou nd(db)); 759 *dst = SkPackRGB16(SkDiv255Round(dr), SkDiv255Round(dg), SkDiv255Rou nd(db));
760 } 760 }
761 dst += 1; 761 dst += 1;
762 } 762 }
763 } 763 }
764 764
765 static void S32_Blend_BlitRow32_mips_dsp(SkPMColor* SK_RESTRICT dst, 765 static void S32_Blend_BlitRow32_mips_dsp(SkPMColor* SK_RESTRICT dst,
766 const SkPMColor* SK_RESTRICT src, 766 const SkPMColor* SK_RESTRICT src,
767 int count, U8CPU alpha) { 767 int count, U8CPU alpha) {
768 register int32_t t0, t1, t2, t3, t4, t5, t6, t7; 768 int32_t t0, t1, t2, t3, t4, t5, t6, t7;
769 769
770 __asm__ volatile ( 770 __asm__ volatile (
771 ".set push \n\t" 771 ".set push \n\t"
772 ".set noreorder \n\t" 772 ".set noreorder \n\t"
773 "li %[t2], 0x100 \n\t" 773 "li %[t2], 0x100 \n\t"
774 "addiu %[t0], %[alpha], 1 \n\t" 774 "addiu %[t0], %[alpha], 1 \n\t"
775 "subu %[t1], %[t2], %[t0] \n\t" 775 "subu %[t1], %[t2], %[t0] \n\t"
776 "replv.qb %[t7], %[t0] \n\t" 776 "replv.qb %[t7], %[t0] \n\t"
777 "replv.qb %[t6], %[t1] \n\t" 777 "replv.qb %[t6], %[t1] \n\t"
778 "1: \n\t" 778 "1: \n\t"
(...skipping 28 matching lines...) Expand all
807 [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3), 807 [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3),
808 [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6), [t7]"=&r"(t7) 808 [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6), [t7]"=&r"(t7)
809 : [alpha]"r"(alpha) 809 : [alpha]"r"(alpha)
810 : "memory", "hi", "lo" 810 : "memory", "hi", "lo"
811 ); 811 );
812 } 812 }
813 813
814 void blitmask_d565_opaque_mips(int width, int height, uint16_t* device, 814 void blitmask_d565_opaque_mips(int width, int height, uint16_t* device,
815 unsigned deviceRB, const uint8_t* alpha, 815 unsigned deviceRB, const uint8_t* alpha,
816 uint32_t expanded32, unsigned maskRB) { 816 uint32_t expanded32, unsigned maskRB) {
817 register uint32_t s0, s1, s2, s3; 817 uint32_t s0, s1, s2, s3;
818 818
819 __asm__ volatile ( 819 __asm__ volatile (
820 ".set push \n\t" 820 ".set push \n\t"
821 ".set noreorder \n\t" 821 ".set noreorder \n\t"
822 ".set noat \n\t" 822 ".set noat \n\t"
823 "li $t9, 0x7E0F81F \n\t" 823 "li $t9, 0x7E0F81F \n\t"
824 "1: \n\t" 824 "1: \n\t"
825 "move $t8, %[width] \n\t" 825 "move $t8, %[width] \n\t"
826 "addiu %[height], %[height], -1 \n\t" 826 "addiu %[height], %[height], -1 \n\t"
827 "2: \n\t" 827 "2: \n\t"
(...skipping 121 matching lines...) Expand 10 before | Expand all | Expand 10 after
949 return platform_565_procs_mips_dsp[flags]; 949 return platform_565_procs_mips_dsp[flags];
950 } 950 }
951 951
952 SkBlitRow::ColorProc16 SkBlitRow::PlatformColorFactory565(unsigned flags) { 952 SkBlitRow::ColorProc16 SkBlitRow::PlatformColorFactory565(unsigned flags) {
953 return nullptr; 953 return nullptr;
954 } 954 }
955 955
956 SkBlitRow::Proc32 SkBlitRow::PlatformProcs32(unsigned flags) { 956 SkBlitRow::Proc32 SkBlitRow::PlatformProcs32(unsigned flags) {
957 return platform_32_procs_mips_dsp[flags]; 957 return platform_32_procs_mips_dsp[flags];
958 } 958 }
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