| Index: src/mips/macro-assembler-mips.cc
|
| diff --git a/src/mips/macro-assembler-mips.cc b/src/mips/macro-assembler-mips.cc
|
| index 95a0064f62715cbc55c0d3e01473297bfbec56ba..13b24fdbb5cea3f7c1f02694387e515422f4e37f 100644
|
| --- a/src/mips/macro-assembler-mips.cc
|
| +++ b/src/mips/macro-assembler-mips.cc
|
| @@ -1915,7 +1915,12 @@ void MacroAssembler::Ins(Register rt,
|
| }
|
|
|
| void MacroAssembler::Neg_s(FPURegister fd, FPURegister fs) {
|
| - if (IsMipsArchVariant(kMips32r2)) {
|
| + if (IsMipsArchVariant(kMips32r6)) {
|
| + // r6 neg_s changes the sign for NaN-like operands as well.
|
| + neg_s(fd, fs);
|
| + } else {
|
| + DCHECK(IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r1) ||
|
| + IsMipsArchVariant(kLoongson));
|
| Label is_nan, done;
|
| Register scratch1 = t8;
|
| Register scratch2 = t9;
|
| @@ -1932,14 +1937,16 @@ void MacroAssembler::Neg_s(FPURegister fd, FPURegister fs) {
|
| Or(scratch2, scratch2, scratch1);
|
| mtc1(scratch2, fd);
|
| bind(&done);
|
| - } else {
|
| - // r6 neg_s changes the sign for NaN-like operands as well.
|
| - neg_s(fd, fs);
|
| }
|
| }
|
|
|
| void MacroAssembler::Neg_d(FPURegister fd, FPURegister fs) {
|
| - if (IsMipsArchVariant(kMips32r2)) {
|
| + if (IsMipsArchVariant(kMips32r6)) {
|
| + // r6 neg_d changes the sign for NaN-like operands as well.
|
| + neg_d(fd, fs);
|
| + } else {
|
| + DCHECK(IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r1) ||
|
| + IsMipsArchVariant(kLoongson));
|
| Label is_nan, done;
|
| Register scratch1 = t8;
|
| Register scratch2 = t9;
|
| @@ -1956,9 +1963,6 @@ void MacroAssembler::Neg_d(FPURegister fd, FPURegister fs) {
|
| Or(scratch2, scratch2, scratch1);
|
| Mthc1(scratch2, fd);
|
| bind(&done);
|
| - } else {
|
| - // r6 neg_d changes the sign for NaN-like operands as well.
|
| - neg_d(fd, fs);
|
| }
|
| }
|
|
|
|
|