Add MIPS SIMD Arch (MSA) optimized MirrorRow function

source/row_msa.cc

Index: source/row_msa.cc
diff --git a/source/row_msa.cc b/source/row_msa.cc
new file mode 100644
index 0000000000000000000000000000000000000000..c63fe4477e5154b526d4a5698f2f23dc168442a4
--- /dev/null
+++ b/source/row_msa.cc
@@ -0,0 +1,45 @@
+/*
+ *  Copyright 2016 The LibYuv Project Authors. All rights reserved.
+ *
+ *  Use of this source code is governed by a BSD-style license
+ *  that can be found in the LICENSE file in the root of the source
+ *  tree. An additional intellectual property rights grant can be found
+ *  in the file PATENTS. All contributing project authors may
+ *  be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include "libyuv/row.h"
+
+#if !defined(LIBYUV_DISABLE_MSA) && defined(__mips_msa)
+#include "libyuv/macros_msa.h"
+#endif
+
+#ifdef __cplusplus
+namespace libyuv {
+extern "C" {
+#endif
+
+#if !defined(LIBYUV_DISABLE_MSA) && defined(__mips_msa)
+void MirrorRow_MSA(const uint8* src, uint8* dst, int width) {
+  int count;
+  v16u8 src0, src1, src2, src3;
+  v16u8 dst0, dst1, dst2, dst3;
+  v16i8 mask = { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 };
+
+  src += width;
+
+  for (count = 0; count < width; count += 64) {
+    src -= 64;

[fbarchard1, 2016/09/19 17:32:41]

src -= 64 just before using src could cause a stall?
if so, moving src -= 64 to bottom of loop would help.  and presubtract 64 before
loop.  src += width - 64;

[manojkumar.bhosale, 2016/09/21 06:30:49]

Done.

+    LD_UB4(src, 16, src3, src2, src1, src0);
+    VSHF_B2_UB(src3, src3, src2, src2, mask, mask, dst3, dst2);
+    VSHF_B2_UB(src1, src1, src0, src0, mask, mask, dst1, dst0);
+    ST_UB4(dst0, dst1, dst2, dst3, dst, 16);
+    dst += 64;
+  }
+}
+#endif  // !defined(LIBYUV_DISABLE_MSA) && defined(__mips_msa)
+
+#ifdef __cplusplus
+}  // extern "C"
+}  // namespace libyuv
+#endif