Chromium Code Reviews| Index: source/cpu_id.cc |
| diff --git a/source/cpu_id.cc b/source/cpu_id.cc |
| index 84927ebc3e2b730fd637ee3519d6881c8751d556..181368981d77fb64d35a0b11ea69db1d8005495f 100644 |
| --- a/source/cpu_id.cc |
| +++ b/source/cpu_id.cc |
| @@ -161,6 +161,38 @@ int ArmCpuCaps(const char* cpuinfo_name) { |
| return 0; |
| } |
| +LIBYUV_API SAFEBUFFERS |
| +int MipsCpuCaps(const char* cpuinfo_name, const char ase[]) { |
| + char cpuinfo_line[512]; |
| + int len = strlen(ase); |
| + FILE* f = fopen(cpuinfo_name, "r"); |
| + if (!f) { |
| + // ase enabled if /proc/cpuinfo is unavailable. |
| + if(!strcmp(ase, " dspr2")) { |
| + return kCpuHasDSPR2; |
| + } |
| + if(!strcmp(ase, " msa")) { |
|
fbarchard1
2016/09/17 01:01:30
if a cpu had both dspr2 and msa, the early return
manojkumar.bhosale
2016/09/19 08:07:21
The 'ase' argument to the function will be either
|
| + return kCpuHasMSA; |
| + } |
| + } |
| + while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) { |
| + if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) { |
| + char* p = strstr(cpuinfo_line, ase); |
| + if (p && (p[len] == ' ' || p[len] == '\n')) { |
| + fclose(f); |
| + if(!strcmp(ase, " dspr2")) { |
| + return kCpuHasDSPR2; |
| + } |
| + if(!strcmp(ase, " msa")) { |
| + return kCpuHasMSA; |
| + } |
| + } |
| + } |
| + } |
| + fclose(f); |
| + return 0; |
| +} |
| + |
| // CPU detect function for SIMD instruction sets. |
| LIBYUV_API |
| int cpu_info_ = 0; // cpu_info is not initialized yet. |
| @@ -254,10 +286,16 @@ int InitCpuFlags(void) { |
| #if defined(__mips_dspr2) |
| cpu_info |= kCpuHasDSPR2; |
| #endif |
| +#if defined(__mips_msa) |
| + cpu_info = MipsCpuCaps("/proc/cpuinfo", " msa"); |
| +#endif |
| cpu_info |= kCpuHasMIPS; |
| if (getenv("LIBYUV_DISABLE_DSPR2")) { |
| cpu_info &= ~kCpuHasDSPR2; |
| } |
| + if (getenv("LIBYUV_DISABLE_MSA")) { |
| + cpu_info &= ~kCpuHasMSA; |
| + } |
| #endif |
| #if defined(__arm__) || defined(__aarch64__) |
| // gcc -mfpu=neon defines __ARM_NEON__ |