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Issue 2285683002: Add MIPS SIMD Arch (MSA) optimized MirrorRow function (Closed)
Patch Set: Changes as per review comments Created 4 years, 3 months ago
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1 /* 1 /*
2 * Copyright 2011 The LibYuv Project Authors. All rights reserved. 2 * Copyright 2011 The LibYuv Project Authors. All rights reserved.
3 * 3 *
4 * Use of this source code is governed by a BSD-style license 4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source 5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found 6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may 7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree. 8 * be found in the AUTHORS file in the root of the source tree.
9 */ 9 */
10 10
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134 } 134 }
135 #endif 135 #endif
136 // TODO(fbarchard): Mirror on mips handle unaligned memory. 136 // TODO(fbarchard): Mirror on mips handle unaligned memory.
137 #if defined(HAS_MIRRORROW_DSPR2) 137 #if defined(HAS_MIRRORROW_DSPR2)
138 if (TestCpuFlag(kCpuHasDSPR2) && 138 if (TestCpuFlag(kCpuHasDSPR2) &&
139 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4) && 139 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4) &&
140 IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4)) { 140 IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4)) {
141 MirrorRow = MirrorRow_DSPR2; 141 MirrorRow = MirrorRow_DSPR2;
142 } 142 }
143 #endif 143 #endif
144 #if defined(HAS_MIRRORROW_MSA)
145 if (TestCpuFlag(kCpuHasMSA)) {
146 MirrorRow = MirrorRow_Any_MSA;
147 if (IS_ALIGNED(width, 64)) {
148 MirrorRow = MirrorRow_MSA;
149 }
150 }
151 #endif
144 #if defined(HAS_COPYROW_SSE2) 152 #if defined(HAS_COPYROW_SSE2)
145 if (TestCpuFlag(kCpuHasSSE2)) { 153 if (TestCpuFlag(kCpuHasSSE2)) {
146 CopyRow = IS_ALIGNED(width, 32) ? CopyRow_SSE2 : CopyRow_Any_SSE2; 154 CopyRow = IS_ALIGNED(width, 32) ? CopyRow_SSE2 : CopyRow_Any_SSE2;
147 } 155 }
148 #endif 156 #endif
149 #if defined(HAS_COPYROW_AVX) 157 #if defined(HAS_COPYROW_AVX)
150 if (TestCpuFlag(kCpuHasAVX)) { 158 if (TestCpuFlag(kCpuHasAVX)) {
151 CopyRow = IS_ALIGNED(width, 64) ? CopyRow_AVX : CopyRow_Any_AVX; 159 CopyRow = IS_ALIGNED(width, 64) ? CopyRow_AVX : CopyRow_Any_AVX;
152 } 160 }
153 #endif 161 #endif
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482 default: 490 default:
483 break; 491 break;
484 } 492 }
485 return -1; 493 return -1;
486 } 494 }
487 495
488 #ifdef __cplusplus 496 #ifdef __cplusplus
489 } // extern "C" 497 } // extern "C"
490 } // namespace libyuv 498 } // namespace libyuv
491 #endif 499 #endif
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