[SubZero] Branch optimization

src/IceInstMIPS32.cpp

Index: src/IceInstMIPS32.cpp
diff --git a/src/IceInstMIPS32.cpp b/src/IceInstMIPS32.cpp
index d26190cb407db19ddbbb1e1fdd811062e9f75343..b9acde9d5b95aee862490d184ccf19453baa58a7 100644
--- a/src/IceInstMIPS32.cpp
+++ b/src/IceInstMIPS32.cpp
@@ -200,6 +200,30 @@ InstMIPS32Br::InstMIPS32Br(Cfg *Func, const CfgNode *TargetTrue,
   addSource(Src1);
 }
 
+CondMIPS32::Cond InstMIPS32::getOppositeCondition(CondMIPS32::Cond Cond) {
+  return InstMIPS32CondAttributes[Cond].Opposite;
+}
+
+bool InstMIPS32Br::optimizeBranch(const CfgNode *NextNode) {
+  // If there is no next block, then there can be no fallthrough to optimize.
+  if (NextNode == nullptr)
+    return false;
+  // Intra-block conditional branches can't be optimized.
+  if (Label)

[Jim Stichnoth, 2016/08/24 15:51:32]

if (Label != nullptr)

[jaydeep.patil, 2016/08/26 10:15:00]

Done.

+    return false;
+  // If there is no fallthrough node, such as a non-default case label for a
+  // switch instruction, then there is no opportunity to optimize.
+  if (getTargetFalse() == nullptr)
+    return false;
+  // Unconditional branch to the next node can be removed.
+  if (isUnconditionalBranch() && getTargetFalse() == NextNode) {
+    assert(getTargetTrue() == nullptr);
+    setDeleted();
+    return true;
+  }
+  return false;
+}
+
 bool InstMIPS32Br::repointEdges(CfgNode *OldNode, CfgNode *NewNode) {
   bool Found = false;
   if (TargetFalse == OldNode) {