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1 // | 1 // |
2 // The Subzero Code Generator | 2 // The Subzero Code Generator |
3 // | 3 // |
4 // This file is distributed under the University of Illinois Open Source | 4 // This file is distributed under the University of Illinois Open Source |
5 // License. See LICENSE.TXT for details. | 5 // License. See LICENSE.TXT for details. |
6 // | 6 // |
7 //===----------------------------------------------------------------------===// | 7 //===----------------------------------------------------------------------===// |
8 /// | 8 /// |
9 /// \file | 9 /// \file |
10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost | 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost |
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389 return; | 389 return; |
390 Func->dump("After stack frame mapping"); | 390 Func->dump("After stack frame mapping"); |
391 | 391 |
392 // Nop insertion | 392 // Nop insertion |
393 if (getFlags().getShouldDoNopInsertion()) { | 393 if (getFlags().getShouldDoNopInsertion()) { |
394 Func->doNopInsertion(); | 394 Func->doNopInsertion(); |
395 } | 395 } |
396 } | 396 } |
397 | 397 |
398 bool TargetMIPS32::doBranchOpt(Inst *Instr, const CfgNode *NextNode) { | 398 bool TargetMIPS32::doBranchOpt(Inst *Instr, const CfgNode *NextNode) { |
399 (void)Instr; | 399 if (auto *Br = llvm::dyn_cast<InstMIPS32Br>(Instr)) { |
400 (void)NextNode; | 400 return Br->optimizeBranch(NextNode); |
401 UnimplementedError(getFlags()); | 401 } |
402 return false; | 402 return false; |
403 } | 403 } |
404 | 404 |
405 namespace { | 405 namespace { |
406 | 406 |
407 const char *RegNames[RegMIPS32::Reg_NUM] = { | 407 const char *RegNames[RegMIPS32::Reg_NUM] = { |
408 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ | 408 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ |
409 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ | 409 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ |
410 name, | 410 name, |
411 REGMIPS32_TABLE | 411 REGMIPS32_TABLE |
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2574 Str << "\t.set\t" | 2574 Str << "\t.set\t" |
2575 << "nomips16\n"; | 2575 << "nomips16\n"; |
2576 } | 2576 } |
2577 | 2577 |
2578 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; | 2578 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; |
2579 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; | 2579 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; |
2580 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 2580 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
2581 | 2581 |
2582 } // end of namespace MIPS32 | 2582 } // end of namespace MIPS32 |
2583 } // end of namespace Ice | 2583 } // end of namespace Ice |
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