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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 351 INLINE(explicit Operand(Context** cpp)); | 351 INLINE(explicit Operand(Context** cpp)); |
| 352 explicit Operand(Handle<Object> handle); | 352 explicit Operand(Handle<Object> handle); |
| 353 INLINE(explicit Operand(Smi* value)); | 353 INLINE(explicit Operand(Smi* value)); |
| 354 | 354 |
| 355 // Register. | 355 // Register. |
| 356 INLINE(explicit Operand(Register rm)); | 356 INLINE(explicit Operand(Register rm)); |
| 357 | 357 |
| 358 // Return true if this is a register operand. | 358 // Return true if this is a register operand. |
| 359 INLINE(bool is_reg() const); | 359 INLINE(bool is_reg() const); |
| 360 | 360 |
| 361 inline int32_t immediate() const { | |
| 362 ASSERT(!is_reg()); | |
| 363 return imm32_; | |
| 364 } | |
| 365 | |
| 366 Register rm() const { return rm_; } | 361 Register rm() const { return rm_; } |
| 367 | 362 |
| 368 private: | 363 private: |
| 369 Register rm_; | 364 Register rm_; |
| 370 int32_t imm32_; // Valid if rm_ == no_reg. | 365 int32_t imm32_; // Valid if rm_ == no_reg. |
| 371 RelocInfo::Mode rmode_; | 366 RelocInfo::Mode rmode_; |
| 372 | 367 |
| 373 friend class Assembler; | 368 friend class Assembler; |
| 374 friend class MacroAssembler; | 369 friend class MacroAssembler; |
| 375 }; | 370 }; |
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| 1210 class EnsureSpace BASE_EMBEDDED { | 1205 class EnsureSpace BASE_EMBEDDED { |
| 1211 public: | 1206 public: |
| 1212 explicit EnsureSpace(Assembler* assembler) { | 1207 explicit EnsureSpace(Assembler* assembler) { |
| 1213 assembler->CheckBuffer(); | 1208 assembler->CheckBuffer(); |
| 1214 } | 1209 } |
| 1215 }; | 1210 }; |
| 1216 | 1211 |
| 1217 } } // namespace v8::internal | 1212 } } // namespace v8::internal |
| 1218 | 1213 |
| 1219 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1214 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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