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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <assert.h> // For assert | 5 #include <assert.h> // For assert |
6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
7 | 7 |
8 #if V8_TARGET_ARCH_S390 | 8 #if V8_TARGET_ARCH_S390 |
9 | 9 |
10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
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3690 int32_t lo_32 = static_cast<int32_t>(value); | 3690 int32_t lo_32 = static_cast<int32_t>(value); |
3691 | 3691 |
3692 iihf(dst, Operand(hi_32)); | 3692 iihf(dst, Operand(hi_32)); |
3693 iilf(dst, Operand(lo_32)); | 3693 iilf(dst, Operand(lo_32)); |
3694 #else | 3694 #else |
3695 int value = src.immediate(); | 3695 int value = src.immediate(); |
3696 iilf(dst, Operand(value)); | 3696 iilf(dst, Operand(value)); |
3697 #endif | 3697 #endif |
3698 } | 3698 } |
3699 | 3699 |
| 3700 void MacroAssembler::Mul32(Register dst, const MemOperand& src1) { |
| 3701 if (is_uint12(src1.offset())) { |
| 3702 ms(dst, src1); |
| 3703 } else if (is_int20(src1.offset())) { |
| 3704 msy(dst, src1); |
| 3705 } else { |
| 3706 UNIMPLEMENTED(); |
| 3707 } |
| 3708 } |
| 3709 |
| 3710 void MacroAssembler::Mul32(Register dst, Register src1) { msr(dst, src1); } |
| 3711 |
| 3712 void MacroAssembler::Mul32(Register dst, const Operand& src1) { |
| 3713 msfi(dst, src1); |
| 3714 } |
| 3715 |
| 3716 void MacroAssembler::Mul64(Register dst, const MemOperand& src1) { |
| 3717 if (is_int20(src1.offset())) { |
| 3718 msg(dst, src1); |
| 3719 } else { |
| 3720 UNIMPLEMENTED(); |
| 3721 } |
| 3722 } |
| 3723 |
| 3724 void MacroAssembler::Mul64(Register dst, Register src1) { msgr(dst, src1); } |
| 3725 |
| 3726 void MacroAssembler::Mul64(Register dst, const Operand& src1) { |
| 3727 msgfi(dst, src1); |
| 3728 } |
| 3729 |
3700 void MacroAssembler::Mul(Register dst, Register src1, Register src2) { | 3730 void MacroAssembler::Mul(Register dst, Register src1, Register src2) { |
3701 if (dst.is(src2)) { | 3731 if (dst.is(src2)) { |
3702 MulP(dst, src1); | 3732 MulP(dst, src1); |
3703 } else if (dst.is(src1)) { | 3733 } else if (dst.is(src1)) { |
3704 MulP(dst, src2); | 3734 MulP(dst, src2); |
3705 } else { | 3735 } else { |
3706 Move(dst, src1); | 3736 Move(dst, src1); |
3707 MulP(dst, src2); | 3737 MulP(dst, src2); |
3708 } | 3738 } |
3709 } | 3739 } |
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5506 } | 5536 } |
5507 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); | 5537 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); |
5508 ExtractBit(r0, dividend, 31); | 5538 ExtractBit(r0, dividend, 31); |
5509 AddP(result, r0); | 5539 AddP(result, r0); |
5510 } | 5540 } |
5511 | 5541 |
5512 } // namespace internal | 5542 } // namespace internal |
5513 } // namespace v8 | 5543 } // namespace v8 |
5514 | 5544 |
5515 #endif // V8_TARGET_ARCH_S390 | 5545 #endif // V8_TARGET_ARCH_S390 |
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