S390: Optimize For Mul in TurboFan codegen

src/compiler/s390/code-generator-s390.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/ast/scopes.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/osr.h"
 #include "src/s390/macro-assembler-s390.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
 #define __ masm()->
 
 #define kScratchReg ip
 
 // Adds S390-specific methods to convert InstructionOperands.
 class S390OperandConverter final : public InstructionOperandConverter {
  public:
   S390OperandConverter(CodeGenerator* gen, Instruction* instr)
       : InstructionOperandConverter(gen, instr) {}
 
   size_t OutputCount() { return instr_->OutputCount(); }
 
+  bool Is64BitOperand(int index) {
+    return LocationOperand::cast(instr_->InputAt(index))->representation() ==
+           MachineRepresentation::kWord64;
+  }
+
+  bool Is32BitOperand(int index) {
+    return LocationOperand::cast(instr_->InputAt(index))->representation() ==
+           MachineRepresentation::kWord32;
+  }
+
   bool CompareLogical() const {
     switch (instr_->flags_condition()) {
       case kUnsignedLessThan:
       case kUnsignedGreaterThanOrEqual:
       case kUnsignedLessThanOrEqual:
       case kUnsignedGreaterThan:
         return true;
       default:
         return false;
     }
@@ skipping 57 matching lines @@
   MemOperand ToMemOperand(InstructionOperand* op) const {
     DCHECK_NOT_NULL(op);
     DCHECK(op->IsStackSlot() || op->IsFPStackSlot());
     return SlotToMemOperand(AllocatedOperand::cast(op)->index());
   }
 
   MemOperand SlotToMemOperand(int slot) const {
     FrameOffset offset = frame_access_state()->GetFrameOffset(slot);
     return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset());
   }
+
+  MemOperand InputStackSlot(size_t index) {
+    InstructionOperand* op = instr_->InputAt(index);
+    return SlotToMemOperand(AllocatedOperand::cast(op)->index());
+  }
 };
 
 static inline bool HasRegisterInput(Instruction* instr, int index) {
   return instr->InputAt(index)->IsRegister();
 }
 
+static inline bool HasImmediateInput(Instruction* instr, size_t index) {
+  return instr->InputAt(index)->IsImmediate();
+}
+
+static inline bool HasStackSlotInput(Instruction* instr, size_t index) {
+  return instr->InputAt(index)->IsStackSlot();
+}
+
 namespace {
 
 class OutOfLineLoadNAN32 final : public OutOfLineCode {
  public:
   OutOfLineLoadNAN32(CodeGenerator* gen, DoubleRegister result)
       : OutOfLineCode(gen), result_(result) {}
 
   void Generate() final {
     __ LoadDoubleLiteral(result_, std::numeric_limits<float>::quiet_NaN(),
                          kScratchReg);
@@ skipping 157 matching lines @@
   do {                                                               \
     __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
                  i.InputDoubleRegister(1));                          \
   } while (0)
 
 #define ASSEMBLE_BINOP(asm_instr)                          \
   do {                                                     \
     if (HasRegisterInput(instr, 1)) {                      \
       __ asm_instr(i.OutputRegister(), i.InputRegister(0), \
                    i.InputRegister(1));                    \
-    } else {                                               \
+    } else if (HasImmediateInput(instr, 1)) {              \
       __ asm_instr(i.OutputRegister(), i.InputRegister(0), \
                    i.InputImmediate(1));                   \
+    } else {                                               \
+      UNIMPLEMENTED();                                     \
     }                                                      \
   } while (0)
 
 #define ASSEMBLE_COMPARE(cmp_instr, cmpl_instr)                 \
   do {                                                          \
     if (HasRegisterInput(instr, 1)) {                           \
       if (i.CompareLogical()) {                                 \
         __ cmpl_instr(i.InputRegister(0), i.InputRegister(1));  \
       } else {                                                  \
         __ cmp_instr(i.InputRegister(0), i.InputRegister(1));   \
@@ skipping 913 matching lines @@
         __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
         __ sdbr(i.OutputDoubleRegister(), kScratchDoubleReg);
       } else {
         if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0))) {
           __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
         }
         __ sdbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
       }
       break;
     case kS390_Mul32:
-#if V8_TARGET_ARCH_S390X
+      if (HasRegisterInput(instr, 1)) {
+        __ Mul32(i.InputRegister(0), i.InputRegister(1));
+      } else if (HasImmediateInput(instr, 1)) {
+        __ Mul32(i.InputRegister(0), i.InputImmediate(1));
+      } else if (HasStackSlotInput(instr, 1)) {
+#ifdef V8_TARGET_ARCH_S390X
+        // Avoid endian-issue here:
+        // stg r1, 0(fp)
+        // ...
+        // msy r2, 0(fp) <-- This will read the upper 32 bits
+        __ lg(kScratchReg, i.InputStackSlot(1));
+        __ Mul32(i.InputRegister(0), kScratchReg);
+#else
+        __ Mul32(i.InputRegister(0), i.InputStackSlot(1));
+#endif
+      } else {
+        UNIMPLEMENTED();
+      }
+      break;
     case kS390_Mul64:
-#endif
-      __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
+      if (HasRegisterInput(instr, 1)) {
+        __ Mul64(i.InputRegister(0), i.InputRegister(1));
+      } else if (HasImmediateInput(instr, 1)) {
+        __ Mul64(i.InputRegister(0), i.InputImmediate(1));
+      } else if (HasStackSlotInput(instr, 1)) {
+        __ Mul64(i.InputRegister(0), i.InputStackSlot(1));
+      } else {
+        UNIMPLEMENTED();
+      }
       break;
     case kS390_MulHigh32:
       __ LoadRR(r1, i.InputRegister(0));
-      __ mr_z(r0, i.InputRegister(1));
+      if (HasRegisterInput(instr, 1)) {
+        __ mr_z(r0, i.InputRegister(1));
+      } else if (HasStackSlotInput(instr, 1)) {
+#ifdef V8_TARGET_ARCH_S390X
+        // Avoid endian-issue here:
+        // stg r1, 0(fp)
+        // ...
+        // mfy r2, 0(fp) <-- This will read the upper 32 bits
+        __ lg(kScratchReg, i.InputStackSlot(1));
+        __ mr_z(r0, kScratchReg);
+#else
+        __ mfy(r0, i.InputStackSlot(1));
+#endif
+      } else {
+        UNIMPLEMENTED();
+      }
       __ LoadW(i.OutputRegister(), r0);
       break;
     case kS390_Mul32WithHigh32:
       __ LoadRR(r1, i.InputRegister(0));
       __ mr_z(r0, i.InputRegister(1));
       __ LoadW(i.OutputRegister(0), r1);  // low
       __ LoadW(i.OutputRegister(1), r0);  // high
       break;
     case kS390_MulHighU32:
       __ LoadRR(r1, i.InputRegister(0));
-      __ mlr(r0, i.InputRegister(1));
+      if (HasRegisterInput(instr, 1)) {
+        __ mlr(r0, i.InputRegister(1));
+      } else if (HasStackSlotInput(instr, 1)) {
+#ifdef V8_TARGET_ARCH_S390X
+        // Avoid endian-issue here:
+        // stg r1, 0(fp)
+        // ...
+        // mfy r2, 0(fp) <-- This will read the upper 32 bits
+        __ lg(kScratchReg, i.InputStackSlot(1));
+        __ mlr(r0, kScratchReg);
+#else
+        __ ml(r0, i.InputStackSlot(1));
+#endif
+      } else {
+        UNIMPLEMENTED();
+      }
       __ LoadlW(i.OutputRegister(), r0);
       break;
     case kS390_MulFloat:
       // Ensure we don't clobber right
       if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
         ASSEMBLE_FLOAT_UNOP(meebr);
       } else {
         if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
           __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
         __ meebr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
@@ skipping 1117 matching lines @@
       padding_size -= 2;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8