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Side by Side Diff: test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc

Issue 2265043002: MIPS: [stubs,interpreter] Optimise SMI loading for 64-bit targets. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file 3 // found in the LICENSE file
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 968 matching lines...) Expand 10 before | Expand all | Expand 10 after
979 m.Word64Sar(m.Parameter(0), m.Int32Constant(32)))); 979 m.Word64Sar(m.Parameter(0), m.Int32Constant(32))));
980 Stream s = m.Build(); 980 Stream s = m.Build();
981 ASSERT_EQ(1U, s.size()); 981 ASSERT_EQ(1U, s.size());
982 EXPECT_EQ(kMips64Dmod, s[0]->arch_opcode()); 982 EXPECT_EQ(kMips64Dmod, s[0]->arch_opcode());
983 EXPECT_EQ(kMode_None, s[0]->addressing_mode()); 983 EXPECT_EQ(kMode_None, s[0]->addressing_mode());
984 ASSERT_EQ(2U, s[0]->InputCount()); 984 ASSERT_EQ(2U, s[0]->InputCount());
985 EXPECT_EQ(1U, s[0]->OutputCount()); 985 EXPECT_EQ(1U, s[0]->OutputCount());
986 } 986 }
987 } 987 }
988 988
989 TEST_F(InstructionSelectorTest, ChangeInt32ToInt64AfterLoad) {
990 // For each case, test that the conversion is merged into the load
991 // operation.
992 // ChangeInt32ToInt64(Load_Uint8) -> Lbu
993 {
994 StreamBuilder m(this, MachineType::Int64(), MachineType::Pointer(),
995 MachineType::Int32());
996 m.Return(m.ChangeInt32ToInt64(
997 m.Load(MachineType::Uint8(), m.Parameter(0), m.Parameter(1))));
998 Stream s = m.Build();
999 ASSERT_EQ(2U, s.size());
1000 EXPECT_EQ(kMips64Lbu, s[1]->arch_opcode());
1001 EXPECT_EQ(kMode_MRI, s[1]->addressing_mode());
1002 EXPECT_EQ(2U, s[1]->InputCount());
1003 EXPECT_EQ(1U, s[1]->OutputCount());
1004 }
1005 // ChangeInt32ToInt64(Load_Int8) -> Lb
1006 {
1007 StreamBuilder m(this, MachineType::Int64(), MachineType::Pointer(),
1008 MachineType::Int32());
1009 m.Return(m.ChangeInt32ToInt64(
1010 m.Load(MachineType::Int8(), m.Parameter(0), m.Parameter(1))));
1011 Stream s = m.Build();
1012 ASSERT_EQ(2U, s.size());
1013 EXPECT_EQ(kMips64Lb, s[1]->arch_opcode());
1014 EXPECT_EQ(kMode_MRI, s[1]->addressing_mode());
1015 EXPECT_EQ(2U, s[1]->InputCount());
1016 EXPECT_EQ(1U, s[1]->OutputCount());
1017 }
1018 // ChangeInt32ToInt64(Load_Uint16) -> Lhu
1019 {
1020 StreamBuilder m(this, MachineType::Int64(), MachineType::Pointer(),
1021 MachineType::Int32());
1022 m.Return(m.ChangeInt32ToInt64(
1023 m.Load(MachineType::Uint16(), m.Parameter(0), m.Parameter(1))));
1024 Stream s = m.Build();
1025 ASSERT_EQ(2U, s.size());
1026 EXPECT_EQ(kMips64Lhu, s[1]->arch_opcode());
1027 EXPECT_EQ(kMode_MRI, s[1]->addressing_mode());
1028 EXPECT_EQ(2U, s[1]->InputCount());
1029 EXPECT_EQ(1U, s[1]->OutputCount());
1030 }
1031 // ChangeInt32ToInt64(Load_Int16) -> Lh
1032 {
1033 StreamBuilder m(this, MachineType::Int64(), MachineType::Pointer(),
1034 MachineType::Int32());
1035 m.Return(m.ChangeInt32ToInt64(
1036 m.Load(MachineType::Int16(), m.Parameter(0), m.Parameter(1))));
1037 Stream s = m.Build();
1038 ASSERT_EQ(2U, s.size());
1039 EXPECT_EQ(kMips64Lh, s[1]->arch_opcode());
1040 EXPECT_EQ(kMode_MRI, s[1]->addressing_mode());
1041 EXPECT_EQ(2U, s[1]->InputCount());
1042 EXPECT_EQ(1U, s[1]->OutputCount());
1043 }
1044 // ChangeInt32ToInt64(Load_Uint32) -> Lw
1045 {
1046 StreamBuilder m(this, MachineType::Int64(), MachineType::Pointer(),
1047 MachineType::Int32());
1048 m.Return(m.ChangeInt32ToInt64(
1049 m.Load(MachineType::Uint32(), m.Parameter(0), m.Parameter(1))));
1050 Stream s = m.Build();
1051 ASSERT_EQ(2U, s.size());
1052 EXPECT_EQ(kMips64Lw, s[1]->arch_opcode());
1053 EXPECT_EQ(kMode_MRI, s[1]->addressing_mode());
1054 EXPECT_EQ(2U, s[1]->InputCount());
1055 EXPECT_EQ(1U, s[1]->OutputCount());
1056 }
1057 // ChangeInt32ToInt64(Load_Int32) -> Lw
1058 {
1059 StreamBuilder m(this, MachineType::Int64(), MachineType::Pointer(),
1060 MachineType::Int32());
1061 m.Return(m.ChangeInt32ToInt64(
1062 m.Load(MachineType::Int32(), m.Parameter(0), m.Parameter(1))));
1063 Stream s = m.Build();
1064 ASSERT_EQ(2U, s.size());
1065 EXPECT_EQ(kMips64Lw, s[1]->arch_opcode());
1066 EXPECT_EQ(kMode_MRI, s[1]->addressing_mode());
1067 EXPECT_EQ(2U, s[1]->InputCount());
1068 EXPECT_EQ(1U, s[1]->OutputCount());
1069 }
1070 }
1071
989 1072
990 // ---------------------------------------------------------------------------- 1073 // ----------------------------------------------------------------------------
991 // Loads and stores. 1074 // Loads and stores.
992 // ---------------------------------------------------------------------------- 1075 // ----------------------------------------------------------------------------
993 1076
994 1077
995 namespace { 1078 namespace {
996 1079
997 struct MemoryAccess { 1080 struct MemoryAccess {
998 MachineType type; 1081 MachineType type;
(...skipping 437 matching lines...) Expand 10 before | Expand all | Expand 10 after
1436 ASSERT_EQ(1U, s.size()); 1519 ASSERT_EQ(1U, s.size());
1437 EXPECT_EQ(kMips64Float64Min, s[0]->arch_opcode()); 1520 EXPECT_EQ(kMips64Float64Min, s[0]->arch_opcode());
1438 ASSERT_EQ(2U, s[0]->InputCount()); 1521 ASSERT_EQ(2U, s[0]->InputCount());
1439 ASSERT_EQ(1U, s[0]->OutputCount()); 1522 ASSERT_EQ(1U, s[0]->OutputCount());
1440 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 1523 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
1441 } 1524 }
1442 1525
1443 } // namespace compiler 1526 } // namespace compiler
1444 } // namespace internal 1527 } // namespace internal
1445 } // namespace v8 1528 } // namespace v8
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