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Side by Side Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 2264533002: [wasm] Add native x64 implementations for I32x4Splat, I32x4ExtractLane (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@macroize_runtime
Patch Set: Review changes Created 4 years, 3 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <algorithm> 5 #include <algorithm>
6 6
7 #include "src/base/adapters.h" 7 #include "src/base/adapters.h"
8 #include "src/compiler/instruction-selector-impl.h" 8 #include "src/compiler/instruction-selector-impl.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/node-properties.h" 10 #include "src/compiler/node-properties.h"
(...skipping 2195 matching lines...) Expand 10 before | Expand all | Expand 10 after
2206 addressing_mode = kMode_MRI; 2206 addressing_mode = kMode_MRI;
2207 } else { 2207 } else {
2208 inputs[input_count++] = g.UseUniqueRegister(index); 2208 inputs[input_count++] = g.UseUniqueRegister(index);
2209 addressing_mode = kMode_MR1; 2209 addressing_mode = kMode_MR1;
2210 } 2210 }
2211 inputs[input_count++] = g.UseUniqueRegister(value); 2211 inputs[input_count++] = g.UseUniqueRegister(value);
2212 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); 2212 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
2213 Emit(code, 0, static_cast<InstructionOperand*>(nullptr), input_count, inputs); 2213 Emit(code, 0, static_cast<InstructionOperand*>(nullptr), input_count, inputs);
2214 } 2214 }
2215 2215
2216 void InstructionSelector::VisitCreateInt32x4(Node* node) {
2217 X64OperandGenerator g(this);
2218 Emit(kX64Int32x4Create, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
2219 }
2220
2221 void InstructionSelector::VisitInt32x4ExtractLane(Node* node) {
2222 X64OperandGenerator g(this);
2223 Emit(kX64Int32x4ExtractLane, g.DefineAsRegister(node),
2224 g.UseRegister(node->InputAt(0)), g.UseImmediate(node->InputAt(1)));
2225 }
2226
2216 // static 2227 // static
2217 MachineOperatorBuilder::Flags 2228 MachineOperatorBuilder::Flags
2218 InstructionSelector::SupportedMachineOperatorFlags() { 2229 InstructionSelector::SupportedMachineOperatorFlags() {
2219 MachineOperatorBuilder::Flags flags = 2230 MachineOperatorBuilder::Flags flags =
2220 MachineOperatorBuilder::kWord32ShiftIsSafe | 2231 MachineOperatorBuilder::kWord32ShiftIsSafe |
2221 MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kWord64Ctz; 2232 MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kWord64Ctz;
2222 if (CpuFeatures::IsSupported(POPCNT)) { 2233 if (CpuFeatures::IsSupported(POPCNT)) {
2223 flags |= MachineOperatorBuilder::kWord32Popcnt | 2234 flags |= MachineOperatorBuilder::kWord32Popcnt |
2224 MachineOperatorBuilder::kWord64Popcnt; 2235 MachineOperatorBuilder::kWord64Popcnt;
2225 } 2236 }
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2239 // static 2250 // static
2240 MachineOperatorBuilder::AlignmentRequirements 2251 MachineOperatorBuilder::AlignmentRequirements
2241 InstructionSelector::AlignmentRequirements() { 2252 InstructionSelector::AlignmentRequirements() {
2242 return MachineOperatorBuilder::AlignmentRequirements:: 2253 return MachineOperatorBuilder::AlignmentRequirements::
2243 FullUnalignedAccessSupport(); 2254 FullUnalignedAccessSupport();
2244 } 2255 }
2245 2256
2246 } // namespace compiler 2257 } // namespace compiler
2247 } // namespace internal 2258 } // namespace internal
2248 } // namespace v8 2259 } // namespace v8
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