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Side by Side Diff: src/compiler/x64/instruction-codes-x64.h

Issue 2264533002: [wasm] Add native x64 implementations for I32x4Splat, I32x4ExtractLane (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@macroize_runtime
Patch Set: Review changes Created 4 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 127 matching lines...) Expand 10 before | Expand all | Expand 10 after
138 V(X64BitcastLD) \ 138 V(X64BitcastLD) \
139 V(X64Lea32) \ 139 V(X64Lea32) \
140 V(X64Lea) \ 140 V(X64Lea) \
141 V(X64Dec32) \ 141 V(X64Dec32) \
142 V(X64Inc32) \ 142 V(X64Inc32) \
143 V(X64Push) \ 143 V(X64Push) \
144 V(X64Poke) \ 144 V(X64Poke) \
145 V(X64StackCheck) \ 145 V(X64StackCheck) \
146 V(X64Xchgb) \ 146 V(X64Xchgb) \
147 V(X64Xchgw) \ 147 V(X64Xchgw) \
148 V(X64Xchgl) 148 V(X64Xchgl) \
149 V(X64Int32x4Create) \
150 V(X64Int32x4ExtractLane)
149 151
150 // Addressing modes represent the "shape" of inputs to an instruction. 152 // Addressing modes represent the "shape" of inputs to an instruction.
151 // Many instructions support multiple addressing modes. Addressing modes 153 // Many instructions support multiple addressing modes. Addressing modes
152 // are encoded into the InstructionCode of the instruction and tell the 154 // are encoded into the InstructionCode of the instruction and tell the
153 // code generator after register allocation which assembler method to call. 155 // code generator after register allocation which assembler method to call.
154 // 156 //
155 // We use the following local notation for addressing modes: 157 // We use the following local notation for addressing modes:
156 // 158 //
157 // M = memory operand 159 // M = memory operand
158 // R = base register 160 // R = base register
(...skipping 18 matching lines...) Expand all
177 V(M1I) /* [ %r2*1 + K] */ \ 179 V(M1I) /* [ %r2*1 + K] */ \
178 V(M2I) /* [ %r2*2 + K] */ \ 180 V(M2I) /* [ %r2*2 + K] */ \
179 V(M4I) /* [ %r2*4 + K] */ \ 181 V(M4I) /* [ %r2*4 + K] */ \
180 V(M8I) /* [ %r2*8 + K] */ 182 V(M8I) /* [ %r2*8 + K] */
181 183
182 } // namespace compiler 184 } // namespace compiler
183 } // namespace internal 185 } // namespace internal
184 } // namespace v8 186 } // namespace v8
185 187
186 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 188 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
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