[interpreter] Make the binary op with Smi bytecode handlers collect type feedback.

src/interpreter/interpreter.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/interpreter/interpreter.h"
 
 #include <fstream>
 #include <memory>
 
 #include "src/ast/prettyprinter.h"
@@ skipping 792 matching lines @@
 }
 
 template <class Generator>
 void Interpreter::DoBinaryOpWithFeedback(InterpreterAssembler* assembler) {
   Node* reg_index = __ BytecodeOperandReg(0);
   Node* lhs = __ LoadRegister(reg_index);
   Node* rhs = __ GetAccumulator();
   Node* context = __ GetContext();
   Node* slot_index = __ BytecodeOperandIdx(1);
   Node* type_feedback_vector = __ LoadTypeFeedbackVector();
-  Node* result = Generator::Generate(assembler, lhs, rhs, context,
-                                     type_feedback_vector, slot_index);
+  Node* result = Generator::Generate(assembler, lhs, rhs, slot_index,
+                                     type_feedback_vector, context);
   __ SetAccumulator(result);
   __ Dispatch();
 }
 
 // Add <src>
 //
 // Add register <src> to accumulator.
 void Interpreter::DoAdd(InterpreterAssembler* assembler) {
   DoBinaryOpWithFeedback<AddWithFeedbackStub>(assembler);
 }
@@ skipping 155 matching lines @@
 // operation <reg> is the lhs operand and <imm> is the <rhs> operand.
 void Interpreter::DoAddSmi(InterpreterAssembler* assembler) {
   Variable var_result(assembler, MachineRepresentation::kTagged);
   Label fastpath(assembler), slowpath(assembler, Label::kDeferred),
       end(assembler);
 
   Node* reg_index = __ BytecodeOperandReg(1);
   Node* left = __ LoadRegister(reg_index);
   Node* raw_int = __ BytecodeOperandImm(0);
   Node* right = __ SmiTag(raw_int);
+  Node* slot_index = __ BytecodeOperandIdx(2);
+  Node* type_feedback_vector = __ LoadTypeFeedbackVector();
 
   // {right} is known to be a Smi.
   // Check if the {left} is a Smi take the fast path.
   __ BranchIf(__ WordIsSmi(left), &fastpath, &slowpath);
   __ Bind(&fastpath);
   {
     // Try fast Smi addition first.
     Node* pair = __ SmiAddWithOverflow(left, right);
     Node* overflow = __ Projection(1, pair);
 
     // Check if the Smi additon overflowed.
     Label if_notoverflow(assembler);
     __ BranchIf(overflow, &slowpath, &if_notoverflow);
     __ Bind(&if_notoverflow);
     {
+      __ UpdateFeedback(__ Int32Constant(BinaryOperationFeedback::kSignedSmall),
+                        type_feedback_vector, slot_index);
       var_result.Bind(__ Projection(0, pair));
       __ Goto(&end);
     }
   }
   __ Bind(&slowpath);
   {
     Node* context = __ GetContext();
-    Callable callable = CodeFactory::Add(__ isolate());
-    var_result.Bind(__ CallStub(callable, context, left, right));
+    AddWithFeedbackStub stub(__ isolate());
+    Callable callable =
+        Callable(stub.GetCode(), AddWithFeedbackStub::Descriptor(__ isolate()));
+    Node* args[] = {left, right, slot_index, type_feedback_vector, context};
+    var_result.Bind(__ CallStubN(callable, args, 1));
     __ Goto(&end);
   }
   __ Bind(&end);
   {
     __ SetAccumulator(var_result.value());
     __ Dispatch();
   }
 }
 
 // SubSmi <imm> <reg>
 //
 // Subtracts an immediate value <imm> to register <reg>. For this
 // operation <reg> is the lhs operand and <imm> is the rhs operand.
 void Interpreter::DoSubSmi(InterpreterAssembler* assembler) {
   Variable var_result(assembler, MachineRepresentation::kTagged);
   Label fastpath(assembler), slowpath(assembler, Label::kDeferred),
       end(assembler);
 
   Node* reg_index = __ BytecodeOperandReg(1);
   Node* left = __ LoadRegister(reg_index);
   Node* raw_int = __ BytecodeOperandImm(0);
   Node* right = __ SmiTag(raw_int);
+  Node* slot_index = __ BytecodeOperandIdx(2);
+  Node* type_feedback_vector = __ LoadTypeFeedbackVector();
 
   // {right} is known to be a Smi.
   // Check if the {left} is a Smi take the fast path.
   __ BranchIf(__ WordIsSmi(left), &fastpath, &slowpath);
   __ Bind(&fastpath);
   {
     // Try fast Smi subtraction first.
     Node* pair = __ SmiSubWithOverflow(left, right);
     Node* overflow = __ Projection(1, pair);
 
     // Check if the Smi subtraction overflowed.
     Label if_notoverflow(assembler);
     __ BranchIf(overflow, &slowpath, &if_notoverflow);
     __ Bind(&if_notoverflow);
     {
+      __ UpdateFeedback(__ Int32Constant(BinaryOperationFeedback::kSignedSmall),
+                        type_feedback_vector, slot_index);
       var_result.Bind(__ Projection(0, pair));
       __ Goto(&end);
     }
   }
   __ Bind(&slowpath);
   {
     Node* context = __ GetContext();
-    Callable callable = CodeFactory::Subtract(__ isolate());
-    var_result.Bind(__ CallStub(callable, context, left, right));
+    SubtractWithFeedbackStub stub(__ isolate());
+    Callable callable = Callable(
+        stub.GetCode(), SubtractWithFeedbackStub::Descriptor(__ isolate()));
+    Node* args[] = {left, right, slot_index, type_feedback_vector, context};
+    var_result.Bind(__ CallStubN(callable, args, 1));
     __ Goto(&end);
   }
   __ Bind(&end);
   {
     __ SetAccumulator(var_result.value());
     __ Dispatch();
   }
 }
 
 // BitwiseOr <imm> <reg>
 //
 // BitwiseOr <reg> with <imm>. For this operation <reg> is the lhs
 // operand and <imm> is the rhs operand.
 void Interpreter::DoBitwiseOrSmi(InterpreterAssembler* assembler) {
   Node* reg_index = __ BytecodeOperandReg(1);
   Node* left = __ LoadRegister(reg_index);
   Node* raw_int = __ BytecodeOperandImm(0);
   Node* right = __ SmiTag(raw_int);
   Node* context = __ GetContext();
-  Node* lhs_value = __ TruncateTaggedToWord32(context, left);
+  Node* slot_index = __ BytecodeOperandIdx(2);
+  Node* type_feedback_vector = __ LoadTypeFeedbackVector();
+  Variable var_lhs_type_feedback(assembler, MachineRepresentation::kWord32);
+  Node* lhs_value = __ TruncateTaggedToWord32WithFeedback(
+      context, left, &var_lhs_type_feedback);
   Node* rhs_value = __ SmiToWord32(right);
   Node* value = __ Word32Or(lhs_value, rhs_value);
   Node* result = __ ChangeInt32ToTagged(value);
+  Node* result_type =
+      __ Select(__ WordIsSmi(result),
+                __ Int32Constant(BinaryOperationFeedback::kSignedSmall),
+                __ Int32Constant(BinaryOperationFeedback::kNumber));
+  __ UpdateFeedback(__ Word32Or(result_type, var_lhs_type_feedback.value()),
+                    type_feedback_vector, slot_index);
   __ SetAccumulator(result);
   __ Dispatch();
 }
 
 // BitwiseAnd <imm> <reg>
 //
 // BitwiseAnd <reg> with <imm>. For this operation <reg> is the lhs
 // operand and <imm> is the rhs operand.
 void Interpreter::DoBitwiseAndSmi(InterpreterAssembler* assembler) {
   Node* reg_index = __ BytecodeOperandReg(1);
   Node* left = __ LoadRegister(reg_index);
   Node* raw_int = __ BytecodeOperandImm(0);
   Node* right = __ SmiTag(raw_int);
   Node* context = __ GetContext();
-  Node* lhs_value = __ TruncateTaggedToWord32(context, left);
+  Node* slot_index = __ BytecodeOperandIdx(2);
+  Node* type_feedback_vector = __ LoadTypeFeedbackVector();
+  Variable var_lhs_type_feedback(assembler, MachineRepresentation::kWord32);
+  Node* lhs_value = __ TruncateTaggedToWord32WithFeedback(
+      context, left, &var_lhs_type_feedback);
   Node* rhs_value = __ SmiToWord32(right);
   Node* value = __ Word32And(lhs_value, rhs_value);
   Node* result = __ ChangeInt32ToTagged(value);
+  Node* result_type =
+      __ Select(__ WordIsSmi(result),
+                __ Int32Constant(BinaryOperationFeedback::kSignedSmall),
+                __ Int32Constant(BinaryOperationFeedback::kNumber));
+  __ UpdateFeedback(__ Word32Or(result_type, var_lhs_type_feedback.value()),
+                    type_feedback_vector, slot_index);
   __ SetAccumulator(result);
   __ Dispatch();
 }
 
 // ShiftLeftSmi <imm> <reg>
 //
 // Left shifts register <src> by the count specified in <imm>.
 // Register <src> is converted to an int32 before the operation. The 5
 // lsb bits from <imm> are used as count i.e. <src> << (<imm> & 0x1F).
 void Interpreter::DoShiftLeftSmi(InterpreterAssembler* assembler) {
   Node* reg_index = __ BytecodeOperandReg(1);
   Node* left = __ LoadRegister(reg_index);
   Node* raw_int = __ BytecodeOperandImm(0);
   Node* right = __ SmiTag(raw_int);
   Node* context = __ GetContext();
-  Node* lhs_value = __ TruncateTaggedToWord32(context, left);
+  Node* slot_index = __ BytecodeOperandIdx(2);
+  Node* type_feedback_vector = __ LoadTypeFeedbackVector();
+  Variable var_lhs_type_feedback(assembler, MachineRepresentation::kWord32);
+  Node* lhs_value = __ TruncateTaggedToWord32WithFeedback(
+      context, left, &var_lhs_type_feedback);
   Node* rhs_value = __ SmiToWord32(right);
   Node* shift_count = __ Word32And(rhs_value, __ Int32Constant(0x1f));
   Node* value = __ Word32Shl(lhs_value, shift_count);
   Node* result = __ ChangeInt32ToTagged(value);
+  Node* result_type =
+      __ Select(__ WordIsSmi(result),
+                __ Int32Constant(BinaryOperationFeedback::kSignedSmall),
+                __ Int32Constant(BinaryOperationFeedback::kNumber));
+  __ UpdateFeedback(__ Word32Or(result_type, var_lhs_type_feedback.value()),
+                    type_feedback_vector, slot_index);
   __ SetAccumulator(result);
   __ Dispatch();
 }
 
 // ShiftRightSmi <imm> <reg>
 //
 // Right shifts register <src> by the count specified in <imm>.
 // Register <src> is converted to an int32 before the operation. The 5
 // lsb bits from <imm> are used as count i.e. <src> << (<imm> & 0x1F).
 void Interpreter::DoShiftRightSmi(InterpreterAssembler* assembler) {
   Node* reg_index = __ BytecodeOperandReg(1);
   Node* left = __ LoadRegister(reg_index);
   Node* raw_int = __ BytecodeOperandImm(0);
   Node* right = __ SmiTag(raw_int);
   Node* context = __ GetContext();
-  Node* lhs_value = __ TruncateTaggedToWord32(context, left);
+  Node* slot_index = __ BytecodeOperandIdx(2);
+  Node* type_feedback_vector = __ LoadTypeFeedbackVector();
+  Variable var_lhs_type_feedback(assembler, MachineRepresentation::kWord32);
+  Node* lhs_value = __ TruncateTaggedToWord32WithFeedback(
+      context, left, &var_lhs_type_feedback);
   Node* rhs_value = __ SmiToWord32(right);
   Node* shift_count = __ Word32And(rhs_value, __ Int32Constant(0x1f));
   Node* value = __ Word32Sar(lhs_value, shift_count);
   Node* result = __ ChangeInt32ToTagged(value);
+  Node* result_type =
+      __ Select(__ WordIsSmi(result),
+                __ Int32Constant(BinaryOperationFeedback::kSignedSmall),
+                __ Int32Constant(BinaryOperationFeedback::kNumber));
+  __ UpdateFeedback(__ Word32Or(result_type, var_lhs_type_feedback.value()),
+                    type_feedback_vector, slot_index);
   __ SetAccumulator(result);
   __ Dispatch();
 }
 
 Node* Interpreter::BuildUnaryOp(Callable callable,
                                 InterpreterAssembler* assembler) {
   Node* target = __ HeapConstant(callable.code());
   Node* accumulator = __ GetAccumulator();
   Node* context = __ GetContext();
   return __ CallStub(callable.descriptor(), target, context, accumulator);
@@ skipping 1181 matching lines @@
   __ StoreObjectField(generator, JSGeneratorObject::kContinuationOffset,
       __ SmiTag(new_state));
   __ SetAccumulator(old_state);
 
   __ Dispatch();
 }
 
 }  // namespace interpreter
 }  // namespace internal
 }  // namespace v8