Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(3)

Side by Side Diff: src/arm64/disasm-arm64.cc

Issue 225743004: ARM64: Fix disassembly of branch targets. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 1614 matching lines...) Expand 10 before | Expand all | Expand 10 after
1625 case 'o': offset = instr->ImmCondBranch(); break; 1625 case 'o': offset = instr->ImmCondBranch(); break;
1626 // BImmCmpa - compare and branch immediate. 1626 // BImmCmpa - compare and branch immediate.
1627 case 'm': offset = instr->ImmCmpBranch(); break; 1627 case 'm': offset = instr->ImmCmpBranch(); break;
1628 // BImmTest - test and branch immediate. 1628 // BImmTest - test and branch immediate.
1629 case 'e': offset = instr->ImmTestBranch(); break; 1629 case 'e': offset = instr->ImmTestBranch(); break;
1630 default: UNREACHABLE(); 1630 default: UNREACHABLE();
1631 } 1631 }
1632 offset <<= kInstructionSizeLog2; 1632 offset <<= kInstructionSizeLog2;
1633 char sign = '+'; 1633 char sign = '+';
1634 if (offset < 0) { 1634 if (offset < 0) {
1635 offset = -offset;
1636 sign = '-'; 1635 sign = '-';
1637 } 1636 }
1638 AppendToOutput("#%c0x%" PRIx64 " (addr %p)", sign, offset, 1637 AppendToOutput("#%c0x%" PRIx64 " (addr %p)", sign, Abs(offset),
1639 instr->InstructionAtOffset(offset), Instruction::NO_CHECK); 1638 instr->InstructionAtOffset(offset), Instruction::NO_CHECK);
1640 return 8; 1639 return 8;
1641 } 1640 }
1642 1641
1643 1642
1644 int Disassembler::SubstituteExtendField(Instruction* instr, 1643 int Disassembler::SubstituteExtendField(Instruction* instr,
1645 const char* format) { 1644 const char* format) {
1646 ASSERT(strncmp(format, "Ext", 3) == 0); 1645 ASSERT(strncmp(format, "Ext", 3) == 0);
1647 ASSERT(instr->ExtendMode() <= 7); 1646 ASSERT(instr->ExtendMode() <= 7);
1648 USE(format); 1647 USE(format);
(...skipping 198 matching lines...) Expand 10 before | Expand all | Expand 10 after
1847 decoder.AppendVisitor(&disasm); 1846 decoder.AppendVisitor(&disasm);
1848 1847
1849 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) { 1848 for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) {
1850 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc)); 1849 decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc));
1851 } 1850 }
1852 } 1851 }
1853 1852
1854 } // namespace disasm 1853 } // namespace disasm
1855 1854
1856 #endif // V8_TARGET_ARCH_ARM64 1855 #endif // V8_TARGET_ARCH_ARM64
OLDNEW
« no previous file with comments | « no previous file | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698