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Issue 2256963003: MIPS: Implement Neg_d and Neg_s instruction macros. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix a typo Created 4 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips64/assembler-mips64.h" 10 #include "src/mips64/assembler-mips64.h"
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873 // into register dst. 873 // into register dst.
874 void LoadFromSafepointRegisterSlot(Register dst, Register src); 874 void LoadFromSafepointRegisterSlot(Register dst, Register src);
875 875
876 // MIPS64 R2 instruction macro. 876 // MIPS64 R2 instruction macro.
877 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size); 877 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
878 void Dins(Register rt, Register rs, uint16_t pos, uint16_t size); 878 void Dins(Register rt, Register rs, uint16_t pos, uint16_t size);
879 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size); 879 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
880 void Dext(Register rt, Register rs, uint16_t pos, uint16_t size); 880 void Dext(Register rt, Register rs, uint16_t pos, uint16_t size);
881 void Dextm(Register rt, Register rs, uint16_t pos, uint16_t size); 881 void Dextm(Register rt, Register rs, uint16_t pos, uint16_t size);
882 void Dextu(Register rt, Register rs, uint16_t pos, uint16_t size); 882 void Dextu(Register rt, Register rs, uint16_t pos, uint16_t size);
883 void Neg_s(FPURegister fd, FPURegister fs);
884 void Neg_d(FPURegister fd, FPURegister fs);
883 885
884 // MIPS64 R6 instruction macros. 886 // MIPS64 R6 instruction macros.
885 void Bovc(Register rt, Register rs, Label* L); 887 void Bovc(Register rt, Register rs, Label* L);
886 void Bnvc(Register rt, Register rs, Label* L); 888 void Bnvc(Register rt, Register rs, Label* L);
887 889
888 // --------------------------------------------------------------------------- 890 // ---------------------------------------------------------------------------
889 // FPU macros. These do not handle special cases like NaN or +- inf. 891 // FPU macros. These do not handle special cases like NaN or +- inf.
890 892
891 // Convert unsigned word to double. 893 // Convert unsigned word to double.
892 void Cvt_d_uw(FPURegister fd, FPURegister fs); 894 void Cvt_d_uw(FPURegister fd, FPURegister fs);
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2060 dd(GetLabelFunction(index)); 2062 dd(GetLabelFunction(index));
2061 } 2063 }
2062 } 2064 }
2063 2065
2064 #define ACCESS_MASM(masm) masm-> 2066 #define ACCESS_MASM(masm) masm->
2065 2067
2066 } // namespace internal 2068 } // namespace internal
2067 } // namespace v8 2069 } // namespace v8
2068 2070
2069 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 2071 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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