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Issue 225393005: x64: Make sure that the upper half of a 64bit register contains 0 for int32 values. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: cvttsd2siq fixes Created 6 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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3269 if (input_reg.is(result_reg)) { 3269 if (input_reg.is(result_reg)) {
3270 subp(rsp, Immediate(kDoubleSize)); 3270 subp(rsp, Immediate(kDoubleSize));
3271 movsd(MemOperand(rsp, 0), xmm0); 3271 movsd(MemOperand(rsp, 0), xmm0);
3272 SlowTruncateToI(result_reg, rsp, 0); 3272 SlowTruncateToI(result_reg, rsp, 0);
3273 addp(rsp, Immediate(kDoubleSize)); 3273 addp(rsp, Immediate(kDoubleSize));
3274 } else { 3274 } else {
3275 SlowTruncateToI(result_reg, input_reg); 3275 SlowTruncateToI(result_reg, input_reg);
3276 } 3276 }
3277 3277
3278 bind(&done); 3278 bind(&done);
3279 movl(result_reg, result_reg);
Benedikt Meurer 2014/04/10 16:35:51 Nit: Add a comment why this is necessary.
3279 } 3280 }
3280 3281
3281 3282
3282 void MacroAssembler::TruncateDoubleToI(Register result_reg, 3283 void MacroAssembler::TruncateDoubleToI(Register result_reg,
3283 XMMRegister input_reg) { 3284 XMMRegister input_reg) {
3284 Label done; 3285 Label done;
3285 cvttsd2siq(result_reg, input_reg); 3286 cvttsd2siq(result_reg, input_reg);
3286 cmpq(result_reg, Immediate(1)); 3287 cmpq(result_reg, Immediate(1));
3287 j(no_overflow, &done, Label::kNear); 3288 j(no_overflow, &done, Label::kNear);
3288 3289
3289 subp(rsp, Immediate(kDoubleSize)); 3290 subp(rsp, Immediate(kDoubleSize));
3290 movsd(MemOperand(rsp, 0), input_reg); 3291 movsd(MemOperand(rsp, 0), input_reg);
3291 SlowTruncateToI(result_reg, rsp, 0); 3292 SlowTruncateToI(result_reg, rsp, 0);
3292 addp(rsp, Immediate(kDoubleSize)); 3293 addp(rsp, Immediate(kDoubleSize));
3293 3294
3294 bind(&done); 3295 bind(&done);
3296 movl(result_reg, result_reg);
Benedikt Meurer 2014/04/10 16:35:51 Nit: Same.
3295 } 3297 }
3296 3298
3297 3299
3298 void MacroAssembler::DoubleToI(Register result_reg, 3300 void MacroAssembler::DoubleToI(Register result_reg,
3299 XMMRegister input_reg, 3301 XMMRegister input_reg,
3300 XMMRegister scratch, 3302 XMMRegister scratch,
3301 MinusZeroMode minus_zero_mode, 3303 MinusZeroMode minus_zero_mode,
3302 Label* conversion_failed, 3304 Label* conversion_failed,
3303 Label::Distance dst) { 3305 Label::Distance dst) {
3304 cvttsd2si(result_reg, input_reg); 3306 cvttsd2si(result_reg, input_reg);
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5149 if (ms.shift() > 0) sarl(rdx, Immediate(ms.shift())); 5151 if (ms.shift() > 0) sarl(rdx, Immediate(ms.shift()));
5150 movl(rax, dividend); 5152 movl(rax, dividend);
5151 shrl(rax, Immediate(31)); 5153 shrl(rax, Immediate(31));
5152 addl(rdx, rax); 5154 addl(rdx, rax);
5153 } 5155 }
5154 5156
5155 5157
5156 } } // namespace v8::internal 5158 } } // namespace v8::internal
5157 5159
5158 #endif // V8_TARGET_ARCH_X64 5160 #endif // V8_TARGET_ARCH_X64
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