[turbofan] Add Float32(Max|Min) machine operators.

src/compiler/mips64/instruction-selector-mips64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/base/bits.h"
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
@@ skipping 1194 matching lines @@
 }
 
 
 void InstructionSelector::VisitFloat64Mod(Node* node) {
   Mips64OperandGenerator g(this);
   Emit(kMips64ModD, g.DefineAsFixed(node, f0),
        g.UseFixed(node->InputAt(0), f12),
        g.UseFixed(node->InputAt(1), f14))->MarkAsCall();
 }
 
+void InstructionSelector::VisitFloat32Max(Node* node) {
+  Mips64OperandGenerator g(this);
+  Emit(kMips64Float32Max, g.DefineAsRegister(node),
+       g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
+}
 
 void InstructionSelector::VisitFloat64Max(Node* node) {
   Mips64OperandGenerator g(this);
   Emit(kMips64Float64Max, g.DefineAsRegister(node),
        g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
 }
 
+void InstructionSelector::VisitFloat32Min(Node* node) {
+  Mips64OperandGenerator g(this);
+  Emit(kMips64Float32Min, g.DefineAsRegister(node),
+       g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
+}
 
 void InstructionSelector::VisitFloat64Min(Node* node) {
   Mips64OperandGenerator g(this);
   Emit(kMips64Float64Min, g.DefineAsRegister(node),
        g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)));
 }
 
 
 void InstructionSelector::VisitFloat32Abs(Node* node) {
   VisitRR(this, kMips64AbsS, node);
@@ skipping 927 matching lines @@
   } else {
     DCHECK(kArchVariant == kMips64r2);
     return MachineOperatorBuilder::AlignmentRequirements::
         NoUnalignedAccessSupport();
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8