[turbofan] Add Float32(Max|Min) machine operators.

src/compiler/mips/instruction-codes-mips.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 101 matching lines @@
   V(MipsUswc1)                     \
   V(MipsLdc1)                      \
   V(MipsUldc1)                     \
   V(MipsSdc1)                      \
   V(MipsUsdc1)                     \
   V(MipsFloat64ExtractLowWord32)   \
   V(MipsFloat64ExtractHighWord32)  \
   V(MipsFloat64InsertLowWord32)    \
   V(MipsFloat64InsertHighWord32)   \
   V(MipsFloat64SilenceNaN)         \
+  V(MipsFloat32Max)                \
   V(MipsFloat64Max)                \
+  V(MipsFloat32Min)                \
   V(MipsFloat64Min)                \
   V(MipsPush)                      \
   V(MipsStoreToStackSlot)          \
   V(MipsByteSwap32)                \
   V(MipsStackClaim)
 
 // Addressing modes represent the "shape" of inputs to an instruction.
 // Many instructions support multiple addressing modes. Addressing modes
 // are encoded into the InstructionCode of the instruction and tell the
 // code generator after register allocation which assembler method to call.
@@ skipping 10 matching lines @@
 #define TARGET_ADDRESSING_MODE_LIST(V) \
   V(MRI) /* [%r0 + K] */               \
   V(MRR) /* [%r0 + %r1] */
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_