[turbofan] Add Float32(Max|Min) machine operators.

src/compiler/arm/instruction-selector-arm.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/base/bits.h"
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
@@ skipping 1458 matching lines @@
   VisitRRR(this, kArmVdivF64, node);
 }
 
 
 void InstructionSelector::VisitFloat64Mod(Node* node) {
   ArmOperandGenerator g(this);
   Emit(kArmVmodF64, g.DefineAsFixed(node, d0), g.UseFixed(node->InputAt(0), d0),
        g.UseFixed(node->InputAt(1), d1))->MarkAsCall();
 }
 
+void InstructionSelector::VisitFloat32Max(Node* node) {
+  VisitRRR(this, kArmFloat32Max, node);
+}
+
 void InstructionSelector::VisitFloat64Max(Node* node) {
   VisitRRR(this, kArmFloat64Max, node);
 }
 
 void InstructionSelector::VisitFloat64SilenceNaN(Node* node) {
   VisitRR(this, kArmFloat64SilenceNaN, node);
 }
 
+void InstructionSelector::VisitFloat32Min(Node* node) {
+  VisitRRR(this, kArmFloat32Min, node);
+}
+
 void InstructionSelector::VisitFloat64Min(Node* node) {
   VisitRRR(this, kArmFloat64Min, node);
 }
 
 void InstructionSelector::VisitFloat32Abs(Node* node) {
   VisitRR(this, kArmVabsF32, node);
 }
 
 
 void InstructionSelector::VisitFloat64Abs(Node* node) {
@@ skipping 761 matching lines @@
   Vector<MachineType> req_aligned = Vector<MachineType>::New(2);
   req_aligned[0] = MachineType::Float32();
   req_aligned[1] = MachineType::Float64();
   return MachineOperatorBuilder::AlignmentRequirements::
       SomeUnalignedAccessUnsupported(req_aligned, req_aligned);
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8