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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
7 | 7 |
8 #include "src/arm64/assembler-arm64.h" | 8 #include "src/arm64/assembler-arm64.h" |
9 #include "src/assembler.h" | 9 #include "src/assembler.h" |
10 #include "src/debug/debug.h" | 10 #include "src/debug/debug.h" |
11 | 11 |
12 | 12 |
13 namespace v8 { | 13 namespace v8 { |
14 namespace internal { | 14 namespace internal { |
15 | 15 |
16 | 16 |
17 bool CpuFeatures::SupportsCrankshaft() { return true; } | 17 bool CpuFeatures::SupportsCrankshaft() { return true; } |
18 | 18 |
19 bool CpuFeatures::SupportsSimd128() { return false; } | 19 bool CpuFeatures::SupportsSimd128() { return false; } |
20 | 20 |
21 void RelocInfo::apply(intptr_t delta) { | 21 void RelocInfo::apply(intptr_t delta) { |
22 // On arm64 only internal references need extra work. | 22 // On arm64 only internal references need extra work. |
23 DCHECK(RelocInfo::IsInternalReference(rmode_)); | 23 DCHECK(RelocInfo::IsInternalReference(rmode_)); |
24 | 24 |
25 // Absolute code pointer inside code object moves with the code object. | 25 // Absolute code pointer inside code object moves with the code object. |
26 intptr_t* p = reinterpret_cast<intptr_t*>(pc_); | 26 intptr_t* p = reinterpret_cast<intptr_t*>(pc_); |
27 *p += delta; // Relocate entry. | 27 *p += delta; // Relocate entry. |
28 } | 28 } |
29 | 29 |
30 | |
31 void RelocInfo::set_target_address(Address target, | |
32 WriteBarrierMode write_barrier_mode, | |
33 ICacheFlushMode icache_flush_mode) { | |
34 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); | |
35 Assembler::set_target_address_at(isolate_, pc_, host_, target, | |
36 icache_flush_mode); | |
37 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL && | |
38 IsCodeTarget(rmode_)) { | |
39 Object* target_code = Code::GetCodeFromTargetAddress(target); | |
40 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( | |
41 host(), this, HeapObject::cast(target_code)); | |
42 } | |
43 } | |
44 | |
45 inline int CPURegister::code() const { | 30 inline int CPURegister::code() const { |
46 DCHECK(IsValid()); | 31 DCHECK(IsValid()); |
47 return reg_code; | 32 return reg_code; |
48 } | 33 } |
49 | 34 |
50 | 35 |
51 inline CPURegister::RegisterType CPURegister::type() const { | 36 inline CPURegister::RegisterType CPURegister::type() const { |
52 DCHECK(IsValidOrNone()); | 37 DCHECK(IsValidOrNone()); |
53 return reg_type; | 38 return reg_type; |
54 } | 39 } |
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1238 | 1223 |
1239 void Assembler::ClearRecordedAstId() { | 1224 void Assembler::ClearRecordedAstId() { |
1240 recorded_ast_id_ = TypeFeedbackId::None(); | 1225 recorded_ast_id_ = TypeFeedbackId::None(); |
1241 } | 1226 } |
1242 | 1227 |
1243 | 1228 |
1244 } // namespace internal | 1229 } // namespace internal |
1245 } // namespace v8 | 1230 } // namespace v8 |
1246 | 1231 |
1247 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 1232 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
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