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1 ; RUN: opt < %s -resolve-pnacl-intrinsics -S | FileCheck %s -check-prefix=CLEANE
D | 1 ; RUN: opt < %s -resolve-pnacl-intrinsics -S | FileCheck %s -check-prefix=CLEANE
D |
2 ; RUN: opt < %s -resolve-pnacl-intrinsics -S | FileCheck %s | 2 ; RUN: opt < %s -resolve-pnacl-intrinsics -S | FileCheck %s |
3 | 3 |
4 ; CLEANED-NOT: call i32 @llvm.nacl.setjmp | 4 ; CLEANED-NOT: call i32 @llvm.nacl.setjmp |
5 ; CLEANED-NOT: call void @llvm.nacl.longjmp | 5 ; CLEANED-NOT: call void @llvm.nacl.longjmp |
6 ; CLEANED-NOT: call {{.*}} @llvm.nacl.atomic | 6 ; CLEANED-NOT: call {{.*}} @llvm.nacl.atomic |
7 | 7 |
8 declare i32 @llvm.nacl.setjmp(i8*) | 8 declare i32 @llvm.nacl.setjmp(i8*) |
9 declare void @llvm.nacl.longjmp(i8*, i32) | 9 declare void @llvm.nacl.longjmp(i8*, i32) |
10 | 10 |
(...skipping 11 matching lines...) Expand all Loading... |
22 declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32) | 22 declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32) |
23 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32) | 23 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32) |
24 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32) | 24 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32) |
25 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32) | 25 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32) |
26 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32) | 26 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32) |
27 declare i8 @llvm.nacl.atomic.cmpxchg.i8(i8*, i8, i8, i32, i32) | 27 declare i8 @llvm.nacl.atomic.cmpxchg.i8(i8*, i8, i8, i32, i32) |
28 declare i16 @llvm.nacl.atomic.cmpxchg.i16(i16*, i16, i16, i32, i32) | 28 declare i16 @llvm.nacl.atomic.cmpxchg.i16(i16*, i16, i16, i32, i32) |
29 declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32) | 29 declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32) |
30 declare i64 @llvm.nacl.atomic.cmpxchg.i64(i64*, i64, i64, i32, i32) | 30 declare i64 @llvm.nacl.atomic.cmpxchg.i64(i64*, i64, i64, i32, i32) |
31 declare void @llvm.nacl.atomic.fence(i32) | 31 declare void @llvm.nacl.atomic.fence(i32) |
| 32 declare void @llvm.nacl.atomic.fence.all() |
32 declare i1 @llvm.nacl.atomic.is.lock.free(i32, i8*) | 33 declare i1 @llvm.nacl.atomic.is.lock.free(i32, i8*) |
33 | 34 |
34 ; These declarations must be here because the function pass expects | 35 ; These declarations must be here because the function pass expects |
35 ; to find them. In real life they're inserted by the translator | 36 ; to find them. In real life they're inserted by the translator |
36 ; before the function pass runs. | 37 ; before the function pass runs. |
37 declare i32 @setjmp(i8*) | 38 declare i32 @setjmp(i8*) |
38 declare void @longjmp(i8*, i32) | 39 declare void @longjmp(i8*, i32) |
39 | 40 |
40 define i32 @call_setjmp(i8* %arg) { | 41 define i32 @call_setjmp(i8* %arg) { |
41 %val = call i32 @llvm.nacl.setjmp(i8* %arg) | 42 %val = call i32 @llvm.nacl.setjmp(i8* %arg) |
(...skipping 44 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
86 ret i32 %1 | 87 ret i32 %1 |
87 } | 88 } |
88 | 89 |
89 ; CHECK: @test_val_compare_and_swap_i32 | 90 ; CHECK: @test_val_compare_and_swap_i32 |
90 define i32 @test_val_compare_and_swap_i32(i32* %ptr, i32 %oldval, i32 %newval) { | 91 define i32 @test_val_compare_and_swap_i32(i32* %ptr, i32 %oldval, i32 %newval) { |
91 ; CHECK: %1 = cmpxchg i32* %ptr, i32 %oldval, i32 %newval seq_cst | 92 ; CHECK: %1 = cmpxchg i32* %ptr, i32 %oldval, i32 %newval seq_cst |
92 %1 = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %oldval, i32 %newva
l, i32 6, i32 6) | 93 %1 = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %oldval, i32 %newva
l, i32 6, i32 6) |
93 ret i32 %1 | 94 ret i32 %1 |
94 } | 95 } |
95 | 96 |
96 ; CHECK: @test_synchronize | 97 ; CHECK: @test_c11_fence |
97 define void @test_synchronize() { | 98 define void @test_c11_fence() { |
98 ; CHECK: fence seq_cst | 99 ; CHECK: fence seq_cst |
99 call void @llvm.nacl.atomic.fence(i32 6) | 100 call void @llvm.nacl.atomic.fence(i32 6) |
100 ret void | 101 ret void |
101 } | 102 } |
102 | 103 |
| 104 ; CHECK: @test_synchronize |
| 105 define void @test_synchronize() { |
| 106 ; CHECK: call void asm sideeffect "", "~{memory}"() |
| 107 ; CHECK: fence seq_cst |
| 108 ; CHECK: call void asm sideeffect "", "~{memory}"() |
| 109 call void @llvm.nacl.atomic.fence.all() |
| 110 ret void |
| 111 } |
| 112 |
103 ; CHECK: @test_is_lock_free_1 | 113 ; CHECK: @test_is_lock_free_1 |
104 define i1 @test_is_lock_free_1(i8* %ptr) { | 114 define i1 @test_is_lock_free_1(i8* %ptr) { |
105 ; CHECK: ret i1 {{true|false}} | 115 ; CHECK: ret i1 {{true|false}} |
106 %res = call i1 @llvm.nacl.atomic.is.lock.free(i32 1, i8* %ptr) | 116 %res = call i1 @llvm.nacl.atomic.is.lock.free(i32 1, i8* %ptr) |
107 ret i1 %res | 117 ret i1 %res |
108 } | 118 } |
109 | 119 |
110 ; CHECK: @test_is_lock_free_2 | 120 ; CHECK: @test_is_lock_free_2 |
111 define i1 @test_is_lock_free_2(i16* %ptr) { | 121 define i1 @test_is_lock_free_2(i16* %ptr) { |
112 ; CHECK: ret i1 {{true|false}} | 122 ; CHECK: ret i1 {{true|false}} |
(...skipping 81 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
194 %1 = call i64 @llvm.nacl.atomic.load.i64(i64* %ptr, i32 6) | 204 %1 = call i64 @llvm.nacl.atomic.load.i64(i64* %ptr, i32 6) |
195 ret i64 %1 | 205 ret i64 %1 |
196 } | 206 } |
197 | 207 |
198 ; CHECK: @test_atomic_store_i64 | 208 ; CHECK: @test_atomic_store_i64 |
199 define void @test_atomic_store_i64(i64* %ptr, i64 %value) { | 209 define void @test_atomic_store_i64(i64* %ptr, i64 %value) { |
200 ; CHECK: store atomic i64 %value, i64* %ptr seq_cst, align 8 | 210 ; CHECK: store atomic i64 %value, i64* %ptr seq_cst, align 8 |
201 call void @llvm.nacl.atomic.store.i64(i64 %value, i64* %ptr, i32 6) | 211 call void @llvm.nacl.atomic.store.i64(i64 %value, i64* %ptr, i32 6) |
202 ret void | 212 ret void |
203 } | 213 } |
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