PPC: Enable unaligned access and clean up the use of UNALIGNED_ACCESSES

src/ppc/constants-ppc.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_PPC_CONSTANTS_PPC_H_
 #define V8_PPC_CONSTANTS_PPC_H_
 
 #include <stdint.h>
 
 #include "src/base/logging.h"
@@ skipping 128 matching lines @@
   LFSU = 49 << 26,     // Load Floating-Point Single with Update
   LFD = 50 << 26,      // Load Floating-Point Double
   LFDU = 51 << 26,     // Load Floating-Point Double with Update
   STFS = 52 << 26,     // Store Floating-Point Single
   STFSU = 53 << 26,    // Store Floating-Point Single with Update
   STFD = 54 << 26,     // Store Floating-Point Double
   STFDU = 55 << 26,    // Store Floating-Point Double with Update
   LD = 58 << 26,       // Load Double Word
   EXT3 = 59 << 26,     // Extended code set 3
   STD = 62 << 26,      // Store Double Word (optionally with Update)
-  EXT4 = 63 << 26      // Extended code set 4
+  EXT4 = 63 << 26,     // Extended code set 4

[JaideepBajwa, 2016/08/15 21:06:52]

is that comma at the end a typo?

 };
 
 // Bits 10-1
 enum OpcodeExt1 {
   MCRF = 0 << 1,      // Move Condition Register Field
   BCLRX = 16 << 1,    // Branch Conditional Link Register
   CRNOR = 33 << 1,    // Condition Register NOR)
   RFI = 50 << 1,      // Return from Interrupt
   CRANDC = 129 << 1,  // Condition Register AND with Complement
   ISYNC = 150 << 1,   // Instruction Synchronize
@@ skipping 74 matching lines @@
   STHUX = 439 << 1,    // store half-word w/ update x-form
   ORX = 444 << 1,      // Or
   DIVDU = 457 << 1,    // Divide Double Word Unsigned
   DIVWU = 459 << 1,    // Divide Word Unsigned
   MTSPR = 467 << 1,    // Move to Special-Purpose-Register
   DIVD = 489 << 1,     // Divide Double Word
   DIVW = 491 << 1,     // Divide Word
   POPCNTD = 506 << 1,  // Population Count Doubleword
 
   // Below represent bits 10-1  (any value >= 512)
+  LHBRX = 790 << 1,    // load half word reversed
+  LWBRX = 534 << 1,    // load word reversed
+  LDBRX = 532 << 1,    // load double word reversed

[JaideepBajwa, 2016/08/15 21:06:52]

add the above in order? to keep it consistent.

   LFSX = 535 << 1,    // load float-single w/ x-form
   SRWX = 536 << 1,    // Shift Right Word
   SRDX = 539 << 1,    // Shift Right Double Word
   LFSUX = 567 << 1,   // load float-single w/ update x-form
   SYNC = 598 << 1,    // Synchronize
   LFDX = 599 << 1,    // load float-double w/ x-form
   LFDUX = 631 << 1,   // load float-double w/ update X-form
   STFSX = 663 << 1,   // store float-single w/ x-form
   STFSUX = 695 << 1,  // store float-single w/ update x-form
   STFDX = 727 << 1,   // store float-double w/ x-form
@@ skipping 336 matching lines @@
   // Lookup the register number for the name provided.
   static int Number(const char* name);
 
  private:
   static const char* names_[kNumDoubleRegisters];
 };
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_PPC_CONSTANTS_PPC_H_