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Side by Side Diff: src/mips64/macro-assembler-mips64.h

Issue 2235703002: MIPS: [compiler] [wasm] Introduce Word32/64ReverseBytes as TF Optional Opcode. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips64/assembler-mips64.h" 10 #include "src/mips64/assembler-mips64.h"
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716 void Dlsa(Register rd, Register rs, Register rt, uint8_t sa, 716 void Dlsa(Register rd, Register rs, Register rt, uint8_t sa,
717 Register scratch = at); 717 Register scratch = at);
718 718
719 void Pref(int32_t hint, const MemOperand& rs); 719 void Pref(int32_t hint, const MemOperand& rs);
720 720
721 721
722 // --------------------------------------------------------------------------- 722 // ---------------------------------------------------------------------------
723 // Pseudo-instructions. 723 // Pseudo-instructions.
724 724
725 // Change endianness 725 // Change endianness
726 void ByteSwapSigned(Register reg, int operand_size); 726 void ByteSwapSigned(Register dest, Register src, int operand_size);
727 void ByteSwapUnsigned(Register reg, int operand_size); 727 void ByteSwapUnsigned(Register dest, Register src, int operand_size);
728 728
729 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } 729 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
730 730
731 void Ulh(Register rd, const MemOperand& rs); 731 void Ulh(Register rd, const MemOperand& rs);
732 void Ulhu(Register rd, const MemOperand& rs); 732 void Ulhu(Register rd, const MemOperand& rs);
733 void Ush(Register rd, const MemOperand& rs, Register scratch); 733 void Ush(Register rd, const MemOperand& rs, Register scratch);
734 734
735 void Ulw(Register rd, const MemOperand& rs); 735 void Ulw(Register rd, const MemOperand& rs);
736 void Ulwu(Register rd, const MemOperand& rs); 736 void Ulwu(Register rd, const MemOperand& rs);
737 void Usw(Register rd, const MemOperand& rs); 737 void Usw(Register rd, const MemOperand& rs);
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2060 dd(GetLabelFunction(index)); 2060 dd(GetLabelFunction(index));
2061 } 2061 }
2062 } 2062 }
2063 2063
2064 #define ACCESS_MASM(masm) masm-> 2064 #define ACCESS_MASM(masm) masm->
2065 2065
2066 } // namespace internal 2066 } // namespace internal
2067 } // namespace v8 2067 } // namespace v8
2068 2068
2069 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 2069 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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