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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 2235703002: MIPS: [compiler] [wasm] Introduce Word32/64ReverseBytes as TF Optional Opcode. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h" 10 #include "src/mips/assembler-mips.h"
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681 void Lsa(Register rd, Register rs, Register rt, uint8_t sa, 681 void Lsa(Register rd, Register rs, Register rt, uint8_t sa,
682 Register scratch = at); 682 Register scratch = at);
683 683
684 void Pref(int32_t hint, const MemOperand& rs); 684 void Pref(int32_t hint, const MemOperand& rs);
685 685
686 686
687 // --------------------------------------------------------------------------- 687 // ---------------------------------------------------------------------------
688 // Pseudo-instructions. 688 // Pseudo-instructions.
689 689
690 // Change endianness 690 // Change endianness
691 void ByteSwapSigned(Register reg, int operand_size); 691 void ByteSwapSigned(Register dest, Register src, int operand_size);
692 void ByteSwapUnsigned(Register reg, int operand_size); 692 void ByteSwapUnsigned(Register dest, Register src, int operand_size);
693 693
694 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } 694 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
695 695
696 void Ulh(Register rd, const MemOperand& rs); 696 void Ulh(Register rd, const MemOperand& rs);
697 void Ulhu(Register rd, const MemOperand& rs); 697 void Ulhu(Register rd, const MemOperand& rs);
698 void Ush(Register rd, const MemOperand& rs, Register scratch); 698 void Ush(Register rd, const MemOperand& rs, Register scratch);
699 699
700 void Ulw(Register rd, const MemOperand& rs); 700 void Ulw(Register rd, const MemOperand& rs);
701 void Usw(Register rd, const MemOperand& rs); 701 void Usw(Register rd, const MemOperand& rs);
702 702
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1913 dd(GetLabelFunction(index)); 1913 dd(GetLabelFunction(index));
1914 } 1914 }
1915 } 1915 }
1916 1916
1917 #define ACCESS_MASM(masm) masm-> 1917 #define ACCESS_MASM(masm) masm->
1918 1918
1919 } // namespace internal 1919 } // namespace internal
1920 } // namespace v8 1920 } // namespace v8
1921 1921
1922 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1922 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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