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1 // Copyright 2015 the V8 project authors. All rights reserved. | 1 // Copyright 2015 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/interpreter/interpreter.h" | 5 #include "src/interpreter/interpreter.h" |
6 | 6 |
7 #include <fstream> | 7 #include <fstream> |
8 #include <memory> | 8 #include <memory> |
9 | 9 |
10 #include "src/ast/prettyprinter.h" | 10 #include "src/ast/prettyprinter.h" |
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804 DoBinaryOpWithFeedback<DivideWithFeedbackStub>(assembler); | 804 DoBinaryOpWithFeedback<DivideWithFeedbackStub>(assembler); |
805 } | 805 } |
806 | 806 |
807 // Mod <src> | 807 // Mod <src> |
808 // | 808 // |
809 // Modulo register <src> by accumulator. | 809 // Modulo register <src> by accumulator. |
810 void Interpreter::DoMod(InterpreterAssembler* assembler) { | 810 void Interpreter::DoMod(InterpreterAssembler* assembler) { |
811 DoBinaryOpWithFeedback<ModulusWithFeedbackStub>(assembler); | 811 DoBinaryOpWithFeedback<ModulusWithFeedbackStub>(assembler); |
812 } | 812 } |
813 | 813 |
814 void Interpreter::DoBitwiseBinaryOp(Token::Value bitwise_op, | |
815 InterpreterAssembler* assembler) { | |
816 Node* reg_index = __ BytecodeOperandReg(0); | |
817 Node* lhs = __ LoadRegister(reg_index); | |
818 Node* rhs = __ GetAccumulator(); | |
819 Node* context = __ GetContext(); | |
820 Node* slot_index = __ BytecodeOperandIdx(1); | |
821 Node* type_feedback_vector = __ LoadTypeFeedbackVector(); | |
822 | |
823 InterpreterAssembler::Variable var_lhs_type_feedback( | |
rmcilroy
2016/08/11 14:09:23
nit - this can just be Variable (without Interpret
epertoso
2016/08/11 14:18:05
Done.
| |
824 assembler, MachineRepresentation::kWord32), | |
825 var_rhs_type_feedback(assembler, MachineRepresentation::kWord32); | |
826 Node* lhs_value = __ TruncateTaggedToWord32WithFeedback( | |
827 context, lhs, &var_lhs_type_feedback); | |
828 Node* rhs_value = __ TruncateTaggedToWord32WithFeedback( | |
829 context, rhs, &var_rhs_type_feedback); | |
830 Node* value = nullptr; | |
rmcilroy
2016/08/11 14:09:23
Unused outside the switch - just declare in the sw
epertoso
2016/08/11 14:18:05
Done.
| |
831 Node* result = nullptr; | |
832 | |
833 switch (bitwise_op) { | |
834 case Token::BIT_OR: | |
835 value = __ Word32Or(lhs_value, rhs_value); | |
836 result = __ ChangeInt32ToTagged(value); | |
837 break; | |
838 case Token::BIT_AND: | |
839 value = __ Word32And(lhs_value, rhs_value); | |
840 result = __ ChangeInt32ToTagged(value); | |
841 break; | |
842 case Token::BIT_XOR: | |
843 value = __ Word32Xor(lhs_value, rhs_value); | |
844 result = __ ChangeInt32ToTagged(value); | |
845 break; | |
846 case Token::SHL: | |
847 value = __ Word32Shl(lhs_value, | |
848 __ Word32And(rhs_value, __ Int32Constant(0x1f))); | |
849 result = __ ChangeInt32ToTagged(value); | |
850 break; | |
851 case Token::SHR: | |
852 value = __ Word32Shr(lhs_value, | |
853 __ Word32And(rhs_value, __ Int32Constant(0x1f))); | |
854 result = __ ChangeUint32ToTagged(value); | |
855 break; | |
856 case Token::SAR: | |
857 value = __ Word32Sar(lhs_value, | |
858 __ Word32And(rhs_value, __ Int32Constant(0x1f))); | |
859 result = __ ChangeInt32ToTagged(value); | |
860 break; | |
861 default: | |
862 UNREACHABLE(); | |
863 } | |
864 | |
865 Node* result_type = | |
866 __ Select(__ WordIsSmi(result), | |
867 __ Int32Constant(BinaryOperationFeedback::kSignedSmall), | |
868 __ Int32Constant(BinaryOperationFeedback::kNumber)); | |
869 | |
870 if (FLAG_debug_code) { | |
871 InterpreterAssembler::Label ok(assembler); | |
rmcilroy
2016/08/11 14:09:23
nit - just Label
epertoso
2016/08/11 14:18:05
Done.
| |
872 __ GotoIf(__ WordIsSmi(result), &ok); | |
873 Node* result_map = __ LoadMap(result); | |
874 __ AbortIfWordNotEqual(result_map, __ HeapNumberMapConstant(), | |
875 kExpectedHeapNumber); | |
876 __ Bind(&ok); | |
877 } | |
878 | |
879 Node* input_feedback = | |
880 __ Word32Or(var_lhs_type_feedback.value(), var_rhs_type_feedback.value()); | |
881 __ UpdateFeedback(__ Word32Or(result_type, input_feedback), | |
882 type_feedback_vector, slot_index); | |
883 __ SetAccumulator(result); | |
884 __ Dispatch(); | |
885 } | |
886 | |
814 // BitwiseOr <src> | 887 // BitwiseOr <src> |
815 // | 888 // |
816 // BitwiseOr register <src> to accumulator. | 889 // BitwiseOr register <src> to accumulator. |
817 void Interpreter::DoBitwiseOr(InterpreterAssembler* assembler) { | 890 void Interpreter::DoBitwiseOr(InterpreterAssembler* assembler) { |
818 DoBinaryOp<BitwiseOrStub>(assembler); | 891 DoBitwiseBinaryOp(Token::BIT_OR, assembler); |
819 } | 892 } |
820 | 893 |
821 // BitwiseXor <src> | 894 // BitwiseXor <src> |
822 // | 895 // |
823 // BitwiseXor register <src> to accumulator. | 896 // BitwiseXor register <src> to accumulator. |
824 void Interpreter::DoBitwiseXor(InterpreterAssembler* assembler) { | 897 void Interpreter::DoBitwiseXor(InterpreterAssembler* assembler) { |
825 DoBinaryOp<BitwiseXorStub>(assembler); | 898 DoBitwiseBinaryOp(Token::BIT_XOR, assembler); |
826 } | 899 } |
827 | 900 |
828 // BitwiseAnd <src> | 901 // BitwiseAnd <src> |
829 // | 902 // |
830 // BitwiseAnd register <src> to accumulator. | 903 // BitwiseAnd register <src> to accumulator. |
831 void Interpreter::DoBitwiseAnd(InterpreterAssembler* assembler) { | 904 void Interpreter::DoBitwiseAnd(InterpreterAssembler* assembler) { |
832 DoBinaryOp<BitwiseAndStub>(assembler); | 905 DoBitwiseBinaryOp(Token::BIT_AND, assembler); |
833 } | 906 } |
834 | 907 |
835 // ShiftLeft <src> | 908 // ShiftLeft <src> |
836 // | 909 // |
837 // Left shifts register <src> by the count specified in the accumulator. | 910 // Left shifts register <src> by the count specified in the accumulator. |
838 // Register <src> is converted to an int32 and the accumulator to uint32 | 911 // Register <src> is converted to an int32 and the accumulator to uint32 |
839 // before the operation. 5 lsb bits from the accumulator are used as count | 912 // before the operation. 5 lsb bits from the accumulator are used as count |
840 // i.e. <src> << (accumulator & 0x1F). | 913 // i.e. <src> << (accumulator & 0x1F). |
841 void Interpreter::DoShiftLeft(InterpreterAssembler* assembler) { | 914 void Interpreter::DoShiftLeft(InterpreterAssembler* assembler) { |
842 DoBinaryOp<ShiftLeftStub>(assembler); | 915 DoBitwiseBinaryOp(Token::SHL, assembler); |
843 } | 916 } |
844 | 917 |
845 // ShiftRight <src> | 918 // ShiftRight <src> |
846 // | 919 // |
847 // Right shifts register <src> by the count specified in the accumulator. | 920 // Right shifts register <src> by the count specified in the accumulator. |
848 // Result is sign extended. Register <src> is converted to an int32 and the | 921 // Result is sign extended. Register <src> is converted to an int32 and the |
849 // accumulator to uint32 before the operation. 5 lsb bits from the accumulator | 922 // accumulator to uint32 before the operation. 5 lsb bits from the accumulator |
850 // are used as count i.e. <src> >> (accumulator & 0x1F). | 923 // are used as count i.e. <src> >> (accumulator & 0x1F). |
851 void Interpreter::DoShiftRight(InterpreterAssembler* assembler) { | 924 void Interpreter::DoShiftRight(InterpreterAssembler* assembler) { |
852 DoBinaryOp<ShiftRightStub>(assembler); | 925 DoBitwiseBinaryOp(Token::SAR, assembler); |
853 } | 926 } |
854 | 927 |
855 // ShiftRightLogical <src> | 928 // ShiftRightLogical <src> |
856 // | 929 // |
857 // Right Shifts register <src> by the count specified in the accumulator. | 930 // Right Shifts register <src> by the count specified in the accumulator. |
858 // Result is zero-filled. The accumulator and register <src> are converted to | 931 // Result is zero-filled. The accumulator and register <src> are converted to |
859 // uint32 before the operation 5 lsb bits from the accumulator are used as | 932 // uint32 before the operation 5 lsb bits from the accumulator are used as |
860 // count i.e. <src> << (accumulator & 0x1F). | 933 // count i.e. <src> << (accumulator & 0x1F). |
861 void Interpreter::DoShiftRightLogical(InterpreterAssembler* assembler) { | 934 void Interpreter::DoShiftRightLogical(InterpreterAssembler* assembler) { |
862 DoBinaryOp<ShiftRightLogicalStub>(assembler); | 935 DoBitwiseBinaryOp(Token::SHR, assembler); |
863 } | 936 } |
864 | 937 |
865 // AddSmi <imm> <reg> | 938 // AddSmi <imm> <reg> |
866 // | 939 // |
867 // Adds an immediate value <imm> to register <reg>. For this | 940 // Adds an immediate value <imm> to register <reg>. For this |
868 // operation <reg> is the lhs operand and <imm> is the <rhs> operand. | 941 // operation <reg> is the lhs operand and <imm> is the <rhs> operand. |
869 void Interpreter::DoAddSmi(InterpreterAssembler* assembler) { | 942 void Interpreter::DoAddSmi(InterpreterAssembler* assembler) { |
870 Variable var_result(assembler, MachineRepresentation::kTagged); | 943 Variable var_result(assembler, MachineRepresentation::kTagged); |
871 Label fastpath(assembler), slowpath(assembler, Label::kDeferred), | 944 Label fastpath(assembler), slowpath(assembler, Label::kDeferred), |
872 end(assembler); | 945 end(assembler); |
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2163 __ StoreObjectField(generator, JSGeneratorObject::kContinuationOffset, | 2236 __ StoreObjectField(generator, JSGeneratorObject::kContinuationOffset, |
2164 __ SmiTag(new_state)); | 2237 __ SmiTag(new_state)); |
2165 __ SetAccumulator(old_state); | 2238 __ SetAccumulator(old_state); |
2166 | 2239 |
2167 __ Dispatch(); | 2240 __ Dispatch(); |
2168 } | 2241 } |
2169 | 2242 |
2170 } // namespace interpreter | 2243 } // namespace interpreter |
2171 } // namespace internal | 2244 } // namespace internal |
2172 } // namespace v8 | 2245 } // namespace v8 |
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