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Side by Side Diff: runtime/vm/stub_code_mips.cc

Issue 2226893002: Optimize AOT's switchable calls for the monomorphic case. (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: sync Created 4 years, 4 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
(...skipping 2132 matching lines...) Expand 10 before | Expand all | Expand 10 after
2143 __ lw(right, Address(SP, 0 * kWordSize)); 2143 __ lw(right, Address(SP, 0 * kWordSize));
2144 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); 2144 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
2145 __ Ret(); 2145 __ Ret();
2146 } 2146 }
2147 2147
2148 2148
2149 // Called from megamorphic calls. 2149 // Called from megamorphic calls.
2150 // T0: receiver 2150 // T0: receiver
2151 // S5: MegamorphicCache (preserved) 2151 // S5: MegamorphicCache (preserved)
2152 // Result: 2152 // Result:
2153 // T1: target entry point
2154 // CODE_REG: target Code
2155 // S4: arguments descriptor 2153 // S4: arguments descriptor
2156 void StubCode::GenerateMegamorphicLookupStub(Assembler* assembler) { 2154 void StubCode::GenerateMegamorphicLookupStub(Assembler* assembler) {
2155 __ NoMonomorphicCheckedEntry();
2156
2157 __ LoadTaggedClassIdMayBeSmi(T0, T0); 2157 __ LoadTaggedClassIdMayBeSmi(T0, T0);
2158 // T0: class ID of the receiver (smi). 2158 // T0: class ID of the receiver (smi).
2159 __ lw(S4, FieldAddress(S5, MegamorphicCache::arguments_descriptor_offset())); 2159 __ lw(S4, FieldAddress(S5, MegamorphicCache::arguments_descriptor_offset()));
2160 __ lw(T2, FieldAddress(S5, MegamorphicCache::buckets_offset())); 2160 __ lw(T2, FieldAddress(S5, MegamorphicCache::buckets_offset()));
2161 __ lw(T1, FieldAddress(S5, MegamorphicCache::mask_offset())); 2161 __ lw(T1, FieldAddress(S5, MegamorphicCache::mask_offset()));
2162 // T2: cache buckets array. 2162 // T2: cache buckets array.
2163 // T1: mask. 2163 // T1: mask.
2164 __ LoadImmediate(TMP, MegamorphicCache::kSpreadFactor); 2164 __ LoadImmediate(TMP, MegamorphicCache::kSpreadFactor);
2165 __ mult(TMP, T0); 2165 __ mult(TMP, T0);
2166 __ mflo(T3); 2166 __ mflo(T3);
(...skipping 20 matching lines...) Expand all
2187 // Call the target found in the cache. For a class id match, this is a 2187 // Call the target found in the cache. For a class id match, this is a
2188 // proper target for the given name and arguments descriptor. If the 2188 // proper target for the given name and arguments descriptor. If the
2189 // illegal class id was found, the target is a cache miss handler that can 2189 // illegal class id was found, the target is a cache miss handler that can
2190 // be invoked as a normal Dart function. 2190 // be invoked as a normal Dart function.
2191 __ sll(T1, T3, 2); 2191 __ sll(T1, T3, 2);
2192 __ addu(T1, T2, T1); 2192 __ addu(T1, T2, T1);
2193 __ lw(T0, FieldAddress(T1, base + kWordSize)); 2193 __ lw(T0, FieldAddress(T1, base + kWordSize));
2194 2194
2195 __ lw(T1, FieldAddress(T0, Function::entry_point_offset())); 2195 __ lw(T1, FieldAddress(T0, Function::entry_point_offset()));
2196 __ lw(CODE_REG, FieldAddress(T0, Function::code_offset())); 2196 __ lw(CODE_REG, FieldAddress(T0, Function::code_offset()));
2197 __ Ret(); 2197 __ jr(T1);
2198 } 2198 }
2199 2199
2200 2200
2201 // Called from switchable IC calls. 2201 // Called from switchable IC calls.
2202 // T0: receiver 2202 // T0: receiver
2203 // S5: ICData (preserved) 2203 // S5: ICData (preserved)
2204 // Result: 2204 // Result:
2205 // T1: target entry point
2206 // CODE_REG: target Code object 2205 // CODE_REG: target Code object
2207 // S4: arguments descriptor 2206 // S4: arguments descriptor
2208 void StubCode::GenerateICLookupThroughFunctionStub(Assembler* assembler) { 2207 void StubCode::GenerateICLookupThroughFunctionStub(Assembler* assembler) {
2208 __ NoMonomorphicCheckedEntry();
2209
2209 Label loop, found, miss; 2210 Label loop, found, miss;
2210 __ lw(T6, FieldAddress(S5, ICData::ic_data_offset())); 2211 __ lw(T6, FieldAddress(S5, ICData::ic_data_offset()));
2211 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset())); 2212 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
2212 __ AddImmediate(T6, T6, Array::data_offset() - kHeapObjectTag); 2213 __ AddImmediate(T6, T6, Array::data_offset() - kHeapObjectTag);
2213 // T6: first IC entry. 2214 // T6: first IC entry.
2214 __ LoadTaggedClassIdMayBeSmi(T1, T0); 2215 __ LoadTaggedClassIdMayBeSmi(T1, T0);
2215 // T1: receiver cid as Smi 2216 // T1: receiver cid as Smi
2216 2217
2217 __ Bind(&loop); 2218 __ Bind(&loop);
2218 __ lw(T2, Address(T6, 0)); 2219 __ lw(T2, Address(T6, 0));
2219 __ beq(T1, T2, &found); 2220 __ beq(T1, T2, &found);
2220 ASSERT(Smi::RawValue(kIllegalCid) == 0); 2221 ASSERT(Smi::RawValue(kIllegalCid) == 0);
2221 __ beq(T2, ZR, &miss); 2222 __ beq(T2, ZR, &miss);
2222 2223
2223 const intptr_t entry_length = ICData::TestEntryLengthFor(1) * kWordSize; 2224 const intptr_t entry_length = ICData::TestEntryLengthFor(1) * kWordSize;
2224 __ AddImmediate(T6, entry_length); // Next entry. 2225 __ AddImmediate(T6, entry_length); // Next entry.
2225 __ b(&loop); 2226 __ b(&loop);
2226 2227
2227 __ Bind(&found); 2228 __ Bind(&found);
2228 const intptr_t target_offset = ICData::TargetIndexFor(1) * kWordSize; 2229 const intptr_t target_offset = ICData::TargetIndexFor(1) * kWordSize;
2229 __ lw(T0, Address(T6, target_offset)); 2230 __ lw(T0, Address(T6, target_offset));
2230 __ lw(T1, FieldAddress(T0, Function::entry_point_offset())); 2231 __ lw(T1, FieldAddress(T0, Function::entry_point_offset()));
2231 __ lw(CODE_REG, FieldAddress(T0, Function::code_offset())); 2232 __ lw(CODE_REG, FieldAddress(T0, Function::code_offset()));
2232 __ Ret(); 2233 __ jr(T1);
2233 2234
2234 __ Bind(&miss); 2235 __ Bind(&miss);
2235 __ LoadIsolate(T2); 2236 __ LoadIsolate(T2);
2236 __ lw(CODE_REG, Address(T2, Isolate::ic_miss_code_offset())); 2237 __ lw(CODE_REG, Address(T2, Isolate::ic_miss_code_offset()));
2237 __ lw(T1, FieldAddress(CODE_REG, Code::entry_point_offset())); 2238 __ lw(T1, FieldAddress(CODE_REG, Code::entry_point_offset()));
2238 __ Ret(); 2239 __ jr(T1);
2239 } 2240 }
2240 2241
2241 2242
2242 void StubCode::GenerateICLookupThroughCodeStub(Assembler* assembler) { 2243 void StubCode::GenerateICLookupThroughCodeStub(Assembler* assembler) {
2244 __ NoMonomorphicCheckedEntry();
2245
2243 Label loop, found, miss; 2246 Label loop, found, miss;
2244 __ lw(T6, FieldAddress(S5, ICData::ic_data_offset())); 2247 __ lw(T6, FieldAddress(S5, ICData::ic_data_offset()));
2245 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset())); 2248 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
2246 __ AddImmediate(T6, T6, Array::data_offset() - kHeapObjectTag); 2249 __ AddImmediate(T6, T6, Array::data_offset() - kHeapObjectTag);
2247 // T6: first IC entry. 2250 // T6: first IC entry.
2248 __ LoadTaggedClassIdMayBeSmi(T1, T0); 2251 __ LoadTaggedClassIdMayBeSmi(T1, T0);
2249 // T1: receiver cid as Smi 2252 // T1: receiver cid as Smi
2250 2253
2251 __ Bind(&loop); 2254 __ Bind(&loop);
2252 __ lw(T2, Address(T6, 0)); 2255 __ lw(T2, Address(T6, 0));
2253 __ beq(T1, T2, &found); 2256 __ beq(T1, T2, &found);
2254 ASSERT(Smi::RawValue(kIllegalCid) == 0); 2257 ASSERT(Smi::RawValue(kIllegalCid) == 0);
2255 __ beq(T2, ZR, &miss); 2258 __ beq(T2, ZR, &miss);
2256 2259
2257 const intptr_t entry_length = ICData::TestEntryLengthFor(1) * kWordSize; 2260 const intptr_t entry_length = ICData::TestEntryLengthFor(1) * kWordSize;
2258 __ AddImmediate(T6, entry_length); // Next entry. 2261 __ AddImmediate(T6, entry_length); // Next entry.
2259 __ b(&loop); 2262 __ b(&loop);
2260 2263
2261 __ Bind(&found); 2264 __ Bind(&found);
2262 const intptr_t code_offset = ICData::CodeIndexFor(1) * kWordSize; 2265 const intptr_t code_offset = ICData::CodeIndexFor(1) * kWordSize;
2263 const intptr_t entry_offset = ICData::EntryPointIndexFor(1) * kWordSize; 2266 const intptr_t entry_offset = ICData::EntryPointIndexFor(1) * kWordSize;
2264 __ lw(T1, Address(T6, entry_offset)); 2267 __ lw(T1, Address(T6, entry_offset));
2265 __ lw(CODE_REG, Address(T6, code_offset)); 2268 __ lw(CODE_REG, Address(T6, code_offset));
2266 __ Ret(); 2269 __ jr(T1);
2267 2270
2268 __ Bind(&miss); 2271 __ Bind(&miss);
2269 __ LoadIsolate(T2); 2272 __ LoadIsolate(T2);
2270 __ lw(CODE_REG, Address(T2, Isolate::ic_miss_code_offset())); 2273 __ lw(CODE_REG, Address(T2, Isolate::ic_miss_code_offset()));
2271 __ lw(T1, FieldAddress(CODE_REG, Code::entry_point_offset())); 2274 __ lw(T1, FieldAddress(CODE_REG, Code::entry_point_offset()));
2272 __ Ret(); 2275 __ jr(T1);
2273 } 2276 }
2274 2277
2275 2278
2279 // Called from the monomorphic checked entry.
2280 // T0: receiver
2281 void StubCode::GenerateMonomorphicMissStub(Assembler* assembler) {
2282 __ EnterStubFrame();
2283 __ Push(T0); // Preserve receiver.
2284
2285 __ PushObject(Object::null_object()); // Result.
2286 __ Push(T0); // Arg0: Receiver
2287 __ CallRuntime(kMonomorphicMissRuntimeEntry, 1);
2288 __ Drop(1);
2289 __ Pop(S5); // result = IC
2290
2291 __ Pop(T0); // Restore receiver.
2292 __ LeaveStubFrame();
2293
2294 __ lw(CODE_REG, Address(THR, Thread::ic_lookup_through_code_stub_offset()));
2295 __ lw(T1, FieldAddress(CODE_REG, Code::checked_entry_point_offset()));
2296 __ jr(T1);
2297 }
2298
2299
2276 void StubCode::GenerateFrameAwaitingMaterializationStub(Assembler* assembler) { 2300 void StubCode::GenerateFrameAwaitingMaterializationStub(Assembler* assembler) {
2277 __ break_(0); 2301 __ break_(0);
2278 } 2302 }
2279 2303
2280 } // namespace dart 2304 } // namespace dart
2281 2305
2282 #endif // defined TARGET_ARCH_MIPS 2306 #endif // defined TARGET_ARCH_MIPS
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