Optimize AOT's switchable calls for the monomorphic case.

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 2136 matching lines @@
 
 
 // Called from megamorphic calls.
 //  T0: receiver
 //  S5: MegamorphicCache (preserved)
 // Result:
 //  T1: target entry point
 //  CODE_REG: target Code
 //  S4: arguments descriptor
 void StubCode::GenerateMegamorphicLookupStub(Assembler* assembler) {
+  __ NoMonomorphicCheckedEntry();
+
   __ LoadTaggedClassIdMayBeSmi(T0, T0);
   // T0: class ID of the receiver (smi).
   __ lw(S4, FieldAddress(S5, MegamorphicCache::arguments_descriptor_offset()));
   __ lw(T2, FieldAddress(S5, MegamorphicCache::buckets_offset()));
   __ lw(T1, FieldAddress(S5, MegamorphicCache::mask_offset()));
   // T2: cache buckets array.
   // T1: mask.
   __ LoadImmediate(TMP, MegamorphicCache::kSpreadFactor);
   __ mult(TMP, T0);
   __ mflo(T3);
@@ skipping 20 matching lines @@
   // Call the target found in the cache.  For a class id match, this is a
   // proper target for the given name and arguments descriptor.  If the
   // illegal class id was found, the target is a cache miss handler that can
   // be invoked as a normal Dart function.
   __ sll(T1, T3, 2);
   __ addu(T1, T2, T1);
   __ lw(T0, FieldAddress(T1, base + kWordSize));
 
   __ lw(T1, FieldAddress(T0, Function::entry_point_offset()));
   __ lw(CODE_REG, FieldAddress(T0, Function::code_offset()));
-  __ Ret();
+  __ jr(T1);
 }
 
 
 // Called from switchable IC calls.
 //  T0: receiver
 //  S5: ICData (preserved)
 // Result:
 //  T1: target entry point
 //  CODE_REG: target Code object
 //  S4: arguments descriptor
 void StubCode::GenerateICLookupThroughFunctionStub(Assembler* assembler) {
+  __ NoMonomorphicCheckedEntry();
+
   Label loop, found, miss;
   __ lw(T6, FieldAddress(S5, ICData::ic_data_offset()));
   __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
   __ AddImmediate(T6, T6, Array::data_offset() - kHeapObjectTag);
   // T6: first IC entry.
   __ LoadTaggedClassIdMayBeSmi(T1, T0);
   // T1: receiver cid as Smi
 
   __ Bind(&loop);
   __ lw(T2, Address(T6, 0));
   __ beq(T1, T2, &found);
   ASSERT(Smi::RawValue(kIllegalCid) == 0);
   __ beq(T2, ZR, &miss);
 
   const intptr_t entry_length = ICData::TestEntryLengthFor(1) * kWordSize;
   __ AddImmediate(T6, entry_length);  // Next entry.
   __ b(&loop);
 
   __ Bind(&found);
   const intptr_t target_offset = ICData::TargetIndexFor(1) * kWordSize;
   __ lw(T0, Address(T6, target_offset));
   __ lw(T1, FieldAddress(T0, Function::entry_point_offset()));
   __ lw(CODE_REG, FieldAddress(T0, Function::code_offset()));
-  __ Ret();
+  __ jr(T1);
 
   __ Bind(&miss);
   __ LoadIsolate(T2);
   __ lw(CODE_REG, Address(T2, Isolate::ic_miss_code_offset()));
   __ lw(T1, FieldAddress(CODE_REG, Code::entry_point_offset()));
-  __ Ret();
+  __ jr(T1);
 }
 
 
 void StubCode::GenerateICLookupThroughCodeStub(Assembler* assembler) {
+  __ NoMonomorphicCheckedEntry();
+
   Label loop, found, miss;
   __ lw(T6, FieldAddress(S5, ICData::ic_data_offset()));
   __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
   __ AddImmediate(T6, T6, Array::data_offset() - kHeapObjectTag);
   // T6: first IC entry.
   __ LoadTaggedClassIdMayBeSmi(T1, T0);
   // T1: receiver cid as Smi
 
   __ Bind(&loop);
   __ lw(T2, Address(T6, 0));
   __ beq(T1, T2, &found);
   ASSERT(Smi::RawValue(kIllegalCid) == 0);
   __ beq(T2, ZR, &miss);
 
   const intptr_t entry_length = ICData::TestEntryLengthFor(1) * kWordSize;
   __ AddImmediate(T6, entry_length);  // Next entry.
   __ b(&loop);
 
   __ Bind(&found);
   const intptr_t code_offset = ICData::CodeIndexFor(1) * kWordSize;
   const intptr_t entry_offset = ICData::EntryPointIndexFor(1) * kWordSize;
   __ lw(T1, Address(T6, entry_offset));
   __ lw(CODE_REG, Address(T6, code_offset));
-  __ Ret();
+  __ jr(T1);
 
   __ Bind(&miss);
   __ LoadIsolate(T2);
   __ lw(CODE_REG, Address(T2, Isolate::ic_miss_code_offset()));
   __ lw(T1, FieldAddress(CODE_REG, Code::entry_point_offset()));
-  __ Ret();
+  __ jr(T1);
 }
 
 
+  // T0: receiver
+void StubCode::GenerateMonomorphicMissStub(Assembler* assembler) {
+  __ EnterStubFrame();
+  __ Push(T0);  // Preserve receiver.
+
+  __ PushObject(Object::null_object());  // Result.
+  __ Push(T0);                           // Arg0: Receiver / stub out
+  __ CallRuntime(kMonomorphicMissRuntimeEntry, 1);
+  __ Pop(CODE_REG);
+  __ Pop(S5);  // result = IC
+
+  __ Pop(T0);  // Restore receiver.
+  __ LeaveStubFrame();
+
+  __ lw(T1, FieldAddress(CODE_REG, Code::checked_entry_point_offset()));
+  __ jr(T1);
+}
+
+
 void StubCode::GenerateFrameAwaitingMaterializationStub(Assembler* assembler) {
   __ break_(0);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS