MIPS: Implement Bovc and Bnvc instruction macros.

src/mips64/macro-assembler-mips64.h

Index: src/mips64/macro-assembler-mips64.h
diff --git a/src/mips64/macro-assembler-mips64.h b/src/mips64/macro-assembler-mips64.h
index eb7cd93d551b1ab5b5143b9db9b95759acfd2897..1fddf2f30a42b3de5d9a72767f7351b9fbaf1248 100644
--- a/src/mips64/macro-assembler-mips64.h
+++ b/src/mips64/macro-assembler-mips64.h
@@ -881,6 +881,10 @@ class MacroAssembler: public Assembler {
   void Dextm(Register rt, Register rs, uint16_t pos, uint16_t size);
   void Dextu(Register rt, Register rs, uint16_t pos, uint16_t size);
 
+  // MIPS64 R6 instruction macros.
+  void Bovc(Register rt, Register rs, Label* L);
+  void Bnvc(Register rt, Register rs, Label* L);
+
   // ---------------------------------------------------------------------------
   // FPU macros. These do not handle special cases like NaN or +- inf.