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Side by Side Diff: src/mips64/macro-assembler-mips64.h

Issue 2225323002: MIPS: Implement Bovc and Bnvc instruction macros. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix typo Created 4 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips64/assembler-mips64.h" 10 #include "src/mips64/assembler-mips64.h"
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874 void LoadFromSafepointRegisterSlot(Register dst, Register src); 874 void LoadFromSafepointRegisterSlot(Register dst, Register src);
875 875
876 // MIPS64 R2 instruction macro. 876 // MIPS64 R2 instruction macro.
877 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size); 877 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
878 void Dins(Register rt, Register rs, uint16_t pos, uint16_t size); 878 void Dins(Register rt, Register rs, uint16_t pos, uint16_t size);
879 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size); 879 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
880 void Dext(Register rt, Register rs, uint16_t pos, uint16_t size); 880 void Dext(Register rt, Register rs, uint16_t pos, uint16_t size);
881 void Dextm(Register rt, Register rs, uint16_t pos, uint16_t size); 881 void Dextm(Register rt, Register rs, uint16_t pos, uint16_t size);
882 void Dextu(Register rt, Register rs, uint16_t pos, uint16_t size); 882 void Dextu(Register rt, Register rs, uint16_t pos, uint16_t size);
883 883
884 // MIPS64 R6 instruction macros.
885 void Bovc(Register rt, Register rs, Label* L);
886 void Bnvc(Register rt, Register rs, Label* L);
887
884 // --------------------------------------------------------------------------- 888 // ---------------------------------------------------------------------------
885 // FPU macros. These do not handle special cases like NaN or +- inf. 889 // FPU macros. These do not handle special cases like NaN or +- inf.
886 890
887 // Convert unsigned word to double. 891 // Convert unsigned word to double.
888 void Cvt_d_uw(FPURegister fd, FPURegister fs); 892 void Cvt_d_uw(FPURegister fd, FPURegister fs);
889 void Cvt_d_uw(FPURegister fd, Register rs); 893 void Cvt_d_uw(FPURegister fd, Register rs);
890 894
891 // Convert unsigned long to double. 895 // Convert unsigned long to double.
892 void Cvt_d_ul(FPURegister fd, FPURegister fs); 896 void Cvt_d_ul(FPURegister fd, FPURegister fs);
893 void Cvt_d_ul(FPURegister fd, Register rs); 897 void Cvt_d_ul(FPURegister fd, Register rs);
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2056 dd(GetLabelFunction(index)); 2060 dd(GetLabelFunction(index));
2057 } 2061 }
2058 } 2062 }
2059 2063
2060 #define ACCESS_MASM(masm) masm-> 2064 #define ACCESS_MASM(masm) masm->
2061 2065
2062 } // namespace internal 2066 } // namespace internal
2063 } // namespace v8 2067 } // namespace v8
2064 2068
2065 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 2069 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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