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Side by Side Diff: src/arm64/macro-assembler-arm64-inl.h

Issue 222433002: ARM64: Introduce a version of ADR handling distant targets. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fix loop offset Created 6 years, 8 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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312 312
313 #define DEFINE_FUNCTION(FN, REGTYPE, REG, OP) \ 313 #define DEFINE_FUNCTION(FN, REGTYPE, REG, OP) \
314 void MacroAssembler::FN(const REGTYPE REG, const MemOperand& addr) { \ 314 void MacroAssembler::FN(const REGTYPE REG, const MemOperand& addr) { \
315 ASSERT(allow_macro_instructions_); \ 315 ASSERT(allow_macro_instructions_); \
316 LoadStoreMacro(REG, addr, OP); \ 316 LoadStoreMacro(REG, addr, OP); \
317 } 317 }
318 LS_MACRO_LIST(DEFINE_FUNCTION) 318 LS_MACRO_LIST(DEFINE_FUNCTION)
319 #undef DEFINE_FUNCTION 319 #undef DEFINE_FUNCTION
320 320
321 321
322 void MacroAssembler::Adr(const Register& rd, Label* label) {
323 ASSERT(allow_macro_instructions_);
324 ASSERT(!rd.IsZero());
325 adr(rd, label);
326 }
327
328
329 void MacroAssembler::Asr(const Register& rd, 322 void MacroAssembler::Asr(const Register& rd,
330 const Register& rn, 323 const Register& rn,
331 unsigned shift) { 324 unsigned shift) {
332 ASSERT(allow_macro_instructions_); 325 ASSERT(allow_macro_instructions_);
333 ASSERT(!rd.IsZero()); 326 ASSERT(!rd.IsZero());
334 asr(rd, rn, shift); 327 asr(rd, rn, shift);
335 } 328 }
336 329
337 330
338 void MacroAssembler::Asr(const Register& rd, 331 void MacroAssembler::Asr(const Register& rd,
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1686 // characters are reserved for controlling features of the instrumentation. 1679 // characters are reserved for controlling features of the instrumentation.
1687 ASSERT(isprint(marker_name[0]) && isprint(marker_name[1])); 1680 ASSERT(isprint(marker_name[0]) && isprint(marker_name[1]));
1688 1681
1689 InstructionAccurateScope scope(this, 1); 1682 InstructionAccurateScope scope(this, 1);
1690 movn(xzr, (marker_name[1] << 8) | marker_name[0]); 1683 movn(xzr, (marker_name[1] << 8) | marker_name[0]);
1691 } 1684 }
1692 1685
1693 } } // namespace v8::internal 1686 } } // namespace v8::internal
1694 1687
1695 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_ 1688 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_INL_H_
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