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Side by Side Diff: src/arm/assembler-arm.h

Issue 222403002: ARM: Avoid VMSR instruction when converting to clamped uint8 (Closed) Base URL: git://github.com/v8/v8.git@master
Patch Set: Created 6 years, 8 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1249 const Condition cond = al); 1249 const Condition cond = al);
1250 void vcvt_f64_f32(const DwVfpRegister dst, 1250 void vcvt_f64_f32(const DwVfpRegister dst,
1251 const SwVfpRegister src, 1251 const SwVfpRegister src,
1252 VFPConversionMode mode = kDefaultRoundToZero, 1252 VFPConversionMode mode = kDefaultRoundToZero,
1253 const Condition cond = al); 1253 const Condition cond = al);
1254 void vcvt_f32_f64(const SwVfpRegister dst, 1254 void vcvt_f32_f64(const SwVfpRegister dst,
1255 const DwVfpRegister src, 1255 const DwVfpRegister src,
1256 VFPConversionMode mode = kDefaultRoundToZero, 1256 VFPConversionMode mode = kDefaultRoundToZero,
1257 const Condition cond = al); 1257 const Condition cond = al);
1258 void vcvt_f64_s32(const DwVfpRegister dst, 1258 void vcvt_f64_s32(const DwVfpRegister dst,
1259 int fraction_bits, 1259 const int fraction_bits,
1260 const Condition cond = al);
1261 void vcvt_u32_f64(const DwVfpRegister dst_src,
1262 const int fraction_bits,
1260 const Condition cond = al); 1263 const Condition cond = al);
1261 1264
1262 void vneg(const DwVfpRegister dst, 1265 void vneg(const DwVfpRegister dst,
1263 const DwVfpRegister src, 1266 const DwVfpRegister src,
1264 const Condition cond = al); 1267 const Condition cond = al);
1265 void vabs(const DwVfpRegister dst, 1268 void vabs(const DwVfpRegister dst,
1266 const DwVfpRegister src, 1269 const DwVfpRegister src,
1267 const Condition cond = al); 1270 const Condition cond = al);
1268 void vadd(const DwVfpRegister dst, 1271 void vadd(const DwVfpRegister dst,
1269 const DwVfpRegister src1, 1272 const DwVfpRegister src1,
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1689 public: 1692 public:
1690 explicit EnsureSpace(Assembler* assembler) { 1693 explicit EnsureSpace(Assembler* assembler) {
1691 assembler->CheckBuffer(); 1694 assembler->CheckBuffer();
1692 } 1695 }
1693 }; 1696 };
1694 1697
1695 1698
1696 } } // namespace v8::internal 1699 } } // namespace v8::internal
1697 1700
1698 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1701 #endif // V8_ARM_ASSEMBLER_ARM_H_
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