include/llvm/IR/Intrinsics.td - Issue 22240002: Rework PNaCl memory ordering

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Issue 22240002: Rework PNaCl memory ordering (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master

Patch Set: Clarify address-free as discussed with sehr. Created 7 years, 4 months ago

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1 //===- Intrinsics.td - Defines all LLVM intrinsics ---------- tablegen --===//	1 //===- Intrinsics.td - Defines all LLVM intrinsics ---------- tablegen --===//

2 //	2 //

3 // The LLVM Compiler Infrastructure	3 // The LLVM Compiler Infrastructure

4 //	4 //

5 // This file is distributed under the University of Illinois Open Source	5 // This file is distributed under the University of Illinois Open Source

6 // License. See LICENSE.TXT for details.	6 // License. See LICENSE.TXT for details.

7 //	7 //

8 //===----------------------------------------------------------------------===//	8 //===----------------------------------------------------------------------===//

9 //	9 //

10 // This file defines properties of all LLVM intrinsics.	10 // This file defines properties of all LLVM intrinsics.

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519 def int_nacl_atomic_rmw : Intrinsic<[llvm_anyint_ty],	519 def int_nacl_atomic_rmw : Intrinsic<[llvm_anyint_ty],

520 [llvm_i32_ty, LLVMPointerType<LLVMMatchType<0>>, LLVMMatchType<0>,	520 [llvm_i32_ty, LLVMPointerType<LLVMMatchType<0>>, LLVMMatchType<0>,

521 llvm_i32_ty],	521 llvm_i32_ty],

522 [IntrReadWriteArgMem]>;	522 [IntrReadWriteArgMem]>;

523 def int_nacl_atomic_cmpxchg : Intrinsic<[llvm_anyint_ty],	523 def int_nacl_atomic_cmpxchg : Intrinsic<[llvm_anyint_ty],

524 [LLVMPointerType<LLVMMatchType<0>>, LLVMMatchType<0>, LLVMMatchType<0>,	524 [LLVMPointerType<LLVMMatchType<0>>, LLVMMatchType<0>, LLVMMatchType<0>,

525 llvm_i32_ty, llvm_i32_ty],	525 llvm_i32_ty, llvm_i32_ty],

526 [IntrReadWriteArgMem]>;	526 [IntrReadWriteArgMem]>;

527 def int_nacl_atomic_fence : Intrinsic<[], [llvm_i32_ty],	527 def int_nacl_atomic_fence : Intrinsic<[], [llvm_i32_ty],

528 [IntrReadWriteArgMem]>;	528 [IntrReadWriteArgMem]>;

	529 def int_nacl_atomic_fence_all : Intrinsic<[], [],

	530 [IntrReadWriteArgMem]>;

529 def int_nacl_atomic_is_lock_free : Intrinsic<[llvm_i1_ty],	531 def int_nacl_atomic_is_lock_free : Intrinsic<[llvm_i1_ty],

530 [llvm_i32_ty, llvm_ptr_ty], [IntrNoMem]>,	532 [llvm_i32_ty, llvm_ptr_ty], [IntrNoMem]>,

531 GCCBuiltin<"__nacl_atomic_is_lock_free">;	533 GCCBuiltin<"__nacl_atomic_is_lock_free">;

532 // @LOCALMOD-END	534 // @LOCALMOD-END

533	535

534 //===----------------------------------------------------------------------===//	536 //===----------------------------------------------------------------------===//

535 // Target-specific intrinsics	537 // Target-specific intrinsics

536 //===----------------------------------------------------------------------===//	538 //===----------------------------------------------------------------------===//

537	539

538 include "llvm/IR/IntrinsicsPowerPC.td"	540 include "llvm/IR/IntrinsicsPowerPC.td"

539 include "llvm/IR/IntrinsicsX86.td"	541 include "llvm/IR/IntrinsicsX86.td"

540 include "llvm/IR/IntrinsicsARM.td"	542 include "llvm/IR/IntrinsicsARM.td"

541 include "llvm/IR/IntrinsicsXCore.td"	543 include "llvm/IR/IntrinsicsXCore.td"

542 include "llvm/IR/IntrinsicsHexagon.td"	544 include "llvm/IR/IntrinsicsHexagon.td"

543 include "llvm/IR/IntrinsicsNVVM.td"	545 include "llvm/IR/IntrinsicsNVVM.td"

544 include "llvm/IR/IntrinsicsMips.td"	546 include "llvm/IR/IntrinsicsMips.td"

545 include "llvm/IR/IntrinsicsR600.td"	547 include "llvm/IR/IntrinsicsR600.td"

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