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Issue 22240002: Rework PNaCl memory ordering (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master
Patch Set: Reorganize documents as suggested by eliben (2). Created 7 years, 4 months ago
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1 ============================== 1 ==============================
2 PNaCl Bitcode Reference Manual 2 PNaCl Bitcode Reference Manual
3 ============================== 3 ==============================
4 4
5 .. contents:: 5 .. contents::
6 :local: 6 :local:
7 :depth: 3 7 :depth: 3
8 8
9 Introduction 9 Introduction
10 ============ 10 ============
(...skipping 125 matching lines...) Expand 10 before | Expand all | Expand 10 after
136 136
137 `LLVM LangRef: Module-Level Inline Assembly <LangRef.html#moduleasm>`_ 137 `LLVM LangRef: Module-Level Inline Assembly <LangRef.html#moduleasm>`_
138 138
139 PNaCl bitcode does not support inline assembly. 139 PNaCl bitcode does not support inline assembly.
140 140
141 Volatile Memory Accesses 141 Volatile Memory Accesses
142 ------------------------ 142 ------------------------
143 143
144 `LLVM LangRef: Volatile Memory Accesses <LangRef.html#volatile>`_ 144 `LLVM LangRef: Volatile Memory Accesses <LangRef.html#volatile>`_
145 145
146 PNaCl bitcode does not support volatile memory accesses. The ``volatile`` 146 PNaCl bitcode does not support volatile memory accesses. The
147 attribute on loads and stores is not supported. See the 147 ``volatile`` attribute on loads and stores is not supported. See the
148 `PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more details. 148 `PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more details.
149 149
150 Memory Model for Concurrent Operations 150 Memory Model for Concurrent Operations
151 -------------------------------------- 151 --------------------------------------
152 152
153 `LLVM LangRef: Memory Model for Concurrent Operations <LangRef.html#memmodel>`_ 153 `LLVM LangRef: Memory Model for Concurrent Operations
154 <LangRef.html#memmodel>`_
154 155
155 See the `PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more details. 156 See the `PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more
157 details.
156 158
157 Atomic Memory Ordering Constraints 159 Atomic Memory Ordering Constraints
158 ---------------------------------- 160 ----------------------------------
159 161
160 `LLVM LangRef: Atomic Memory Ordering Constraints <LangRef.html#ordering>`_ 162 `LLVM LangRef: Atomic Memory Ordering Constraints <LangRef.html#ordering>`_
161 163
162 PNaCl bitcode currently supports sequential consistency only, through its 164 PNaCl bitcode currently supports sequential consistency only, through
163 `atomic intrinsics`_. See the 165 its `atomic intrinsics`_. See the `PNaCl Developer's Guide
164 `PNaCl Developer's Guide <PNaClDeveloperGuide.html>`_ for more details. 166 <PNaClDeveloperGuide.html>`_ for more details. It supports sequential
167 consistency as defined by C11/C++11, as well as a stronger form of
168 sequential consistency which attempts to act as a barrier for non-atomic
169 and non-``volatile`` accesses.
170
171 The integer values for these memory ordering constraints are in
172 ``"llvm/IR/NaClAtomicIntrinsics.h"``.
165 173
166 Fast-Math Flags 174 Fast-Math Flags
167 --------------- 175 ---------------
168 176
169 `LLVM LangRef: Fast-Math Flags <LangRef.html#fastmath>`_ 177 `LLVM LangRef: Fast-Math Flags <LangRef.html#fastmath>`_
170 178
171 Fast-math mode is not currently supported by the PNaCl bitcode. 179 Fast-math mode is not currently supported by the PNaCl bitcode.
172 180
173 Type System 181 Type System
174 =========== 182 ===========
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403 411
404 See :ref:`Setjmp and Longjmp <setjmplongjmp>`. 412 See :ref:`Setjmp and Longjmp <setjmplongjmp>`.
405 413
406 .. _atomic intrinsics: 414 .. _atomic intrinsics:
407 415
408 * ``llvm.nacl.atomic.store`` 416 * ``llvm.nacl.atomic.store``
409 * ``llvm.nacl.atomic.load`` 417 * ``llvm.nacl.atomic.load``
410 * ``llvm.nacl.atomic.rmw`` 418 * ``llvm.nacl.atomic.rmw``
411 * ``llvm.nacl.atomic.cmpxchg`` 419 * ``llvm.nacl.atomic.cmpxchg``
412 * ``llvm.nacl.atomic.fence`` 420 * ``llvm.nacl.atomic.fence``
421 * ``llvm.nacl.atomic.is.lock.free``
413 422
414 See :ref:`atomic intrinsics <atomicintrinsics>`. 423 See :ref:`atomic intrinsics <atomicintrinsics>`.
415 424
416 .. _threadpointerintrinsics: 425 .. _threadpointerintrinsics:
417 426
418 Thread pointer related intrinsics 427 Thread pointer related intrinsics
419 --------------------------------- 428 ---------------------------------
420 429
421 .. code-block:: llvm 430 .. code-block:: llvm
422 431
423 declare i8* @llvm.nacl.read.tp() 432 declare i8* @llvm.nacl.read.tp()
424 433
425 Returns the thread pointer, which can be set by the embedding sandbox's runtime. 434 Returns the thread pointer, which can be set by the embedding sandbox's runtime.
426 435
427 .. _setjmplongjmp: 436 .. _setjmplongjmp:
428 437
429 Setjmp and Longjmp 438 Setjmp and Longjmp
430 ------------------ 439 ------------------
431 440
432 .. code-block:: llvm 441 .. code-block:: llvm
433 442
434 declare void @llvm.nacl.longjmp(i8* %jmpbuf, i32) 443 declare void @llvm.nacl.longjmp(i8* %jmpbuf, i32)
435 declare i32 @llvm.nacl.setjmp(i8* %jmpbuf) 444 declare i32 @llvm.nacl.setjmp(i8* %jmpbuf)
436 445
437 These intrinsics implement the semantics of C11 ``setjmp`` and ``longjmp``. The 446 These intrinsics implement the semantics of C11 ``setjmp`` and
438 ``jmpbuf`` pointer must be 64-bit aligned and point to at least 1024 bytes of 447 ``longjmp``. The ``jmpbuf`` pointer must be 64-bit aligned and point to
439 allocated memory. 448 at least 1024 bytes of allocated memory.
440 449
441 .. _atomicintrinsics: 450 .. _atomicintrinsics:
442 451
443 Atomic intrinsics 452 Atomic intrinsics
444 ----------------- 453 -----------------
445 454
446 .. code-block:: llvm 455 .. code-block:: llvm
447 456
448 declare iN @llvm.nacl.atomic.load.<size>( 457 declare iN @llvm.nacl.atomic.load.<size>(
449 iN* <source>, i32 <memory_order>) 458 iN* <source>, i32 <memory_order>)
450 declare void @llvm.nacl.atomic.store.<size>( 459 declare void @llvm.nacl.atomic.store.<size>(
451 iN <operand>, iN* <destination>, i32 <memory_order>) 460 iN <operand>, iN* <destination>, i32 <memory_order>)
452 declare iN @llvm.nacl.atomic.rmw.<size>( 461 declare iN @llvm.nacl.atomic.rmw.<size>(
453 i32 <computation>, iN* <object>, iN <operand>, i32 <memory_order>) 462 i32 <computation>, iN* <object>, iN <operand>, i32 <memory_order>)
454 declare iN @llvm.nacl.atomic.cmpxchg.<size>( 463 declare iN @llvm.nacl.atomic.cmpxchg.<size>(
455 iN* <object>, iN <expected>, iN <desired>, 464 iN* <object>, iN <expected>, iN <desired>,
456 i32 <memory_order_success>, i32 <memory_order_failure>) 465 i32 <memory_order_success>, i32 <memory_order_failure>)
457 declare void @llvm.nacl.atomic.fence(i32 <memory_order>) 466 declare void @llvm.nacl.atomic.fence(i32 <memory_order>)
458 467
459 Each of these intrinsics is overloaded on the ``iN`` argument, which 468 Each of these intrinsics is overloaded on the ``iN`` argument, which is
460 is reflected through ``<size>`` in the overload's name. Integral types 469 reflected through ``<size>`` in the overload's name. Integral types of
461 of 8, 16, 32 and 64-bit width are supported for these arguments. 470 8, 16, 32 and 64-bit width are supported for these arguments.
462 471
463 The ``@llvm.nacl.atomic.rmw`` intrinsic implements the following 472 The ``@llvm.nacl.atomic.rmw`` intrinsic implements the following
464 read-modify-write operations, from the general and arithmetic sections 473 read-modify-write operations, from the general and arithmetic sections
465 of the C11/C++11 standards: 474 of the C11/C++11 standards:
466 475
467 - ``add`` 476 - ``add``
468 - ``sub`` 477 - ``sub``
469 - ``or`` 478 - ``or``
470 - ``and`` 479 - ``and``
471 - ``xor`` 480 - ``xor``
472 - ``exchange`` 481 - ``exchange``
473 482
474 For all of these read-modify-write operations, the returned value is 483 For all of these read-modify-write operations, the returned value is
475 that at ``object`` before the computation. The ``computation`` 484 that at ``object`` before the computation. The ``computation`` argument
476 argument must be a compile-time constant. 485 must be a compile-time constant.
477 486
478 All atomic intrinsics also support C11/C++11 memory orderings, which 487 All atomic intrinsics also support C11/C++11 memory orderings, which
479 must be compile-time constants. Those are detailed in `Atomic Memory 488 must be compile-time constants. Those are detailed in `Atomic Memory
480 Ordering Constraints`_. 489 Ordering Constraints`_.
481 490
482 Integer values for these computations and memory orderings are defined 491 Integer values for these computations and memory orderings are defined
483 in ``"llvm/IR/NaClAtomicIntrinsics.h"``. 492 in ``"llvm/IR/NaClAtomicIntrinsics.h"``.
484 493
485 .. note:: 494 .. note::
486 495
487 These intrinsics allow PNaCl to support C11/C++11 style atomic 496 These intrinsics allow PNaCl to support C11/C++11 style atomic
488 operations as well as some legacy GCC-style ``__sync_*`` builtins 497 operations as well as some legacy GCC-style ``__sync_*`` builtins
489 while remaining stable as the LLVM codebase changes. The user 498 while remaining stable as the LLVM codebase changes. The user isn't
490 isn't expected to use these intrinsics directly. 499 expected to use these intrinsics directly.
491 500
492 .. code-block:: llvm 501 .. code-block:: llvm
493 502
494 declare i1 @llvm.nacl.atomic.is.lock.free(i32 <byte_size>, i8* <address>) 503 declare i1 @llvm.nacl.atomic.is.lock.free(i32 <byte_size>, i8* <address>)
495 504
496 The ``llvm.nacl.atomic.is.lock.free`` intrinsic is designed to 505 The ``llvm.nacl.atomic.is.lock.free`` intrinsic is designed to
497 determine at translation time whether atomic operations of a certain 506 determine at translation time whether atomic operations of a certain
498 ``byte_size`` (a compile-time constant), at a particular ``address``, 507 ``byte_size`` (a compile-time constant), at a particular ``address``,
499 are lock-free or not. This reflects the C11 ``atomic_is_lock_free`` 508 are lock-free or not. This reflects the C11 ``atomic_is_lock_free``
500 function from header ``<stdatomic.h>`` and the C++11 ``is_lock_free`` 509 function from header ``<stdatomic.h>`` and the C++11 ``is_lock_free``
501 member function in header ``<atomic>``. It can be used through the 510 member function in header ``<atomic>``. It can be used through the
502 ``__nacl_atomic_is_lock_free`` builtin. 511 ``__nacl_atomic_is_lock_free`` builtin.
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