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Side by Side Diff: src/IceTargetLoweringMIPS32.cpp

Issue 2223783002: [SubZero][MIPS32]: Add return registers for float/double types in lowerCall (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 4 months ago
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1 // 1 //
2 // The Subzero Code Generator 2 // The Subzero Code Generator
3 // 3 //
4 // This file is distributed under the University of Illinois Open Source 4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details. 5 // License. See LICENSE.TXT for details.
6 // 6 //
7 //===----------------------------------------------------------------------===// 7 //===----------------------------------------------------------------------===//
8 /// 8 ///
9 /// \file 9 /// \file
10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
(...skipping 1750 matching lines...) Expand 10 before | Expand all | Expand 10 after
1761 case IceType_i8: 1761 case IceType_i8:
1762 case IceType_i16: 1762 case IceType_i16:
1763 case IceType_i32: 1763 case IceType_i32:
1764 ReturnReg = makeReg(Dest->getType(), RegMIPS32::Reg_V0); 1764 ReturnReg = makeReg(Dest->getType(), RegMIPS32::Reg_V0);
1765 break; 1765 break;
1766 case IceType_i64: 1766 case IceType_i64:
1767 ReturnReg = I32Reg(RegMIPS32::Reg_V0); 1767 ReturnReg = I32Reg(RegMIPS32::Reg_V0);
1768 ReturnRegHi = I32Reg(RegMIPS32::Reg_V1); 1768 ReturnRegHi = I32Reg(RegMIPS32::Reg_V1);
1769 break; 1769 break;
1770 case IceType_f32: 1770 case IceType_f32:
1771 ReturnReg = makeReg(Dest->getType(), RegMIPS32::Reg_F0);
1772 break;
1771 case IceType_f64: 1773 case IceType_f64:
1772 UnimplementedLoweringError(this, Instr); 1774 ReturnReg = makeReg(IceType_f32, RegMIPS32::Reg_F0);
1773 return; 1775 ReturnRegHi = makeReg(IceType_f32, RegMIPS32::Reg_F1);
1776 break;
1774 case IceType_v4i1: 1777 case IceType_v4i1:
1775 case IceType_v8i1: 1778 case IceType_v8i1:
1776 case IceType_v16i1: 1779 case IceType_v16i1:
1777 case IceType_v16i8: 1780 case IceType_v16i8:
1778 case IceType_v8i16: 1781 case IceType_v8i16:
1779 case IceType_v4i32: 1782 case IceType_v4i32:
1780 case IceType_v4f32: 1783 case IceType_v4f32:
1781 UnimplementedLoweringError(this, Instr); 1784 UnimplementedLoweringError(this, Instr);
1782 return; 1785 return;
1783 } 1786 }
(...skipping 787 matching lines...) Expand 10 before | Expand all | Expand 10 after
2571 Str << "\t.set\t" 2574 Str << "\t.set\t"
2572 << "nomips16\n"; 2575 << "nomips16\n";
2573 } 2576 }
2574 2577
2575 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; 2578 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
2576 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; 2579 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
2577 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; 2580 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
2578 2581
2579 } // end of namespace MIPS32 2582 } // end of namespace MIPS32
2580 } // end of namespace Ice 2583 } // end of namespace Ice
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