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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <algorithm> | 5 #include <algorithm> |
6 | 6 |
7 #include "src/base/adapters.h" | 7 #include "src/base/adapters.h" |
8 #include "src/compiler/instruction-selector-impl.h" | 8 #include "src/compiler/instruction-selector-impl.h" |
9 #include "src/compiler/node-matchers.h" | 9 #include "src/compiler/node-matchers.h" |
10 #include "src/compiler/node-properties.h" | 10 #include "src/compiler/node-properties.h" |
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1105 if (success_output) { | 1105 if (success_output) { |
1106 outputs[output_count++] = g.DefineAsRegister(success_output); | 1106 outputs[output_count++] = g.DefineAsRegister(success_output); |
1107 } | 1107 } |
1108 | 1108 |
1109 Emit(kSSEFloat64ToUint64, output_count, outputs, 1, inputs); | 1109 Emit(kSSEFloat64ToUint64, output_count, outputs, 1, inputs); |
1110 } | 1110 } |
1111 | 1111 |
1112 | 1112 |
1113 void InstructionSelector::VisitChangeInt32ToInt64(Node* node) { | 1113 void InstructionSelector::VisitChangeInt32ToInt64(Node* node) { |
1114 X64OperandGenerator g(this); | 1114 X64OperandGenerator g(this); |
1115 Node* const value = node->InputAt(0); | 1115 Emit(kX64Movsxlq, g.DefineAsRegister(node), g.Use(node->InputAt(0))); |
1116 if (value->opcode() == IrOpcode::kLoad && CanCover(node, value)) { | |
1117 LoadRepresentation load_rep = LoadRepresentationOf(value->op()); | |
1118 MachineRepresentation rep = load_rep.representation(); | |
1119 InstructionCode opcode = kArchNop; | |
1120 switch (rep) { | |
1121 case MachineRepresentation::kBit: // Fall through. | |
1122 case MachineRepresentation::kWord8: | |
1123 opcode = load_rep.IsSigned() ? kX64Movsxbq : kX64Movzxbq; | |
1124 break; | |
1125 case MachineRepresentation::kWord16: | |
1126 opcode = load_rep.IsSigned() ? kX64Movsxwq : kX64Movzxwq; | |
1127 break; | |
1128 case MachineRepresentation::kWord32: | |
1129 opcode = kX64Movsxlq; | |
1130 break; | |
1131 default: | |
1132 UNREACHABLE(); | |
1133 return; | |
1134 } | |
1135 InstructionOperand outputs[] = {g.DefineAsRegister(node)}; | |
1136 size_t input_count = 0; | |
1137 InstructionOperand inputs[3]; | |
1138 AddressingMode mode = g.GetEffectiveAddressMemoryOperand( | |
1139 node->InputAt(0), inputs, &input_count); | |
1140 opcode |= AddressingModeField::encode(mode); | |
1141 Emit(opcode, 1, outputs, input_count, inputs); | |
1142 } else { | |
1143 Emit(kX64Movsxlq, g.DefineAsRegister(node), g.Use(node->InputAt(0))); | |
1144 } | |
1145 } | 1116 } |
1146 | 1117 |
1147 | 1118 |
1148 void InstructionSelector::VisitChangeUint32ToUint64(Node* node) { | 1119 void InstructionSelector::VisitChangeUint32ToUint64(Node* node) { |
1149 X64OperandGenerator g(this); | 1120 X64OperandGenerator g(this); |
1150 Node* value = node->InputAt(0); | 1121 Node* value = node->InputAt(0); |
1151 switch (value->opcode()) { | 1122 switch (value->opcode()) { |
1152 case IrOpcode::kWord32And: | 1123 case IrOpcode::kWord32And: |
1153 case IrOpcode::kWord32Or: | 1124 case IrOpcode::kWord32Or: |
1154 case IrOpcode::kWord32Xor: | 1125 case IrOpcode::kWord32Xor: |
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2232 // static | 2203 // static |
2233 MachineOperatorBuilder::AlignmentRequirements | 2204 MachineOperatorBuilder::AlignmentRequirements |
2234 InstructionSelector::AlignmentRequirements() { | 2205 InstructionSelector::AlignmentRequirements() { |
2235 return MachineOperatorBuilder::AlignmentRequirements:: | 2206 return MachineOperatorBuilder::AlignmentRequirements:: |
2236 FullUnalignedAccessSupport(); | 2207 FullUnalignedAccessSupport(); |
2237 } | 2208 } |
2238 | 2209 |
2239 } // namespace compiler | 2210 } // namespace compiler |
2240 } // namespace internal | 2211 } // namespace internal |
2241 } // namespace v8 | 2212 } // namespace v8 |
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