| Index: src/compiler/ia32/instruction-selector-ia32.cc
|
| diff --git a/src/compiler/ia32/instruction-selector-ia32.cc b/src/compiler/ia32/instruction-selector-ia32.cc
|
| index e24d764fe28b6ef42c79d9374935f742fb24ef23..34f2f5b73e4e430eb1c08104332c8e1746badeb5 100644
|
| --- a/src/compiler/ia32/instruction-selector-ia32.cc
|
| +++ b/src/compiler/ia32/instruction-selector-ia32.cc
|
| @@ -929,44 +929,10 @@ void InstructionSelector::VisitFloat64Add(Node* node) {
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|
|
|
|
| void InstructionSelector::VisitFloat32Sub(Node* node) {
|
| - IA32OperandGenerator g(this);
|
| - Float32BinopMatcher m(node);
|
| - if (m.left().IsMinusZero()) {
|
| - VisitFloatUnop(this, node, m.right().node(), kAVXFloat32Neg,
|
| - kSSEFloat32Neg);
|
| - return;
|
| - }
|
| - VisitRROFloat(this, node, kAVXFloat32Sub, kSSEFloat32Sub);
|
| -}
|
| -
|
| -void InstructionSelector::VisitFloat32SubPreserveNan(Node* node) {
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| VisitRROFloat(this, node, kAVXFloat32Sub, kSSEFloat32Sub);
|
| }
|
|
|
| void InstructionSelector::VisitFloat64Sub(Node* node) {
|
| - IA32OperandGenerator g(this);
|
| - Float64BinopMatcher m(node);
|
| - if (m.left().IsMinusZero()) {
|
| - if (m.right().IsFloat64RoundDown() &&
|
| - CanCover(m.node(), m.right().node())) {
|
| - if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub &&
|
| - CanCover(m.right().node(), m.right().InputAt(0))) {
|
| - Float64BinopMatcher mright0(m.right().InputAt(0));
|
| - if (mright0.left().IsMinusZero()) {
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| - Emit(kSSEFloat64Round | MiscField::encode(kRoundUp),
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| - g.DefineAsRegister(node), g.UseRegister(mright0.right().node()));
|
| - return;
|
| - }
|
| - }
|
| - }
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| - VisitFloatUnop(this, node, m.right().node(), kAVXFloat64Neg,
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| - kSSEFloat64Neg);
|
| - return;
|
| - }
|
| - VisitRROFloat(this, node, kAVXFloat64Sub, kSSEFloat64Sub);
|
| -}
|
| -
|
| -void InstructionSelector::VisitFloat64SubPreserveNan(Node* node) {
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| VisitRROFloat(this, node, kAVXFloat64Sub, kSSEFloat64Sub);
|
| }
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|
|