Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(51)

Side by Side Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 2220973002: [turbofan] Remove the FloatXXSubPreserveNan operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Reintroduce an optimization for arm. Created 4 years, 4 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
(...skipping 1246 matching lines...) Expand 10 before | Expand all | Expand 10 after
1257 break; 1257 break;
1258 case kMips64AddS: 1258 case kMips64AddS:
1259 // TODO(plind): add special case: combine mult & add. 1259 // TODO(plind): add special case: combine mult & add.
1260 __ add_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1260 __ add_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1261 i.InputDoubleRegister(1)); 1261 i.InputDoubleRegister(1));
1262 break; 1262 break;
1263 case kMips64SubS: 1263 case kMips64SubS:
1264 __ sub_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1264 __ sub_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1265 i.InputDoubleRegister(1)); 1265 i.InputDoubleRegister(1));
1266 break; 1266 break;
1267 case kMips64SubPreserveNanS:
1268 __ SubNanPreservePayloadAndSign_s(i.OutputDoubleRegister(),
1269 i.InputDoubleRegister(0),
1270 i.InputDoubleRegister(1));
1271 break;
1272 case kMips64MulS: 1267 case kMips64MulS:
1273 // TODO(plind): add special case: right op is -1.0, see arm port. 1268 // TODO(plind): add special case: right op is -1.0, see arm port.
1274 __ mul_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1269 __ mul_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1275 i.InputDoubleRegister(1)); 1270 i.InputDoubleRegister(1));
1276 break; 1271 break;
1277 case kMips64DivS: 1272 case kMips64DivS:
1278 __ div_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1273 __ div_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1279 i.InputDoubleRegister(1)); 1274 i.InputDoubleRegister(1));
1280 break; 1275 break;
1281 case kMips64ModS: { 1276 case kMips64ModS: {
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after
1315 break; 1310 break;
1316 case kMips64AddD: 1311 case kMips64AddD:
1317 // TODO(plind): add special case: combine mult & add. 1312 // TODO(plind): add special case: combine mult & add.
1318 __ add_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1313 __ add_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1319 i.InputDoubleRegister(1)); 1314 i.InputDoubleRegister(1));
1320 break; 1315 break;
1321 case kMips64SubD: 1316 case kMips64SubD:
1322 __ sub_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1317 __ sub_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1323 i.InputDoubleRegister(1)); 1318 i.InputDoubleRegister(1));
1324 break; 1319 break;
1325 case kMips64SubPreserveNanD:
1326 __ SubNanPreservePayloadAndSign_d(i.OutputDoubleRegister(),
1327 i.InputDoubleRegister(0),
1328 i.InputDoubleRegister(1));
1329 break;
1330 case kMips64MulD: 1320 case kMips64MulD:
1331 // TODO(plind): add special case: right op is -1.0, see arm port. 1321 // TODO(plind): add special case: right op is -1.0, see arm port.
1332 __ mul_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1322 __ mul_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1333 i.InputDoubleRegister(1)); 1323 i.InputDoubleRegister(1));
1334 break; 1324 break;
1335 case kMips64DivD: 1325 case kMips64DivD:
1336 __ div_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 1326 __ div_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
1337 i.InputDoubleRegister(1)); 1327 i.InputDoubleRegister(1));
1338 break; 1328 break;
1339 case kMips64ModD: { 1329 case kMips64ModD: {
(...skipping 1126 matching lines...) Expand 10 before | Expand all | Expand 10 after
2466 padding_size -= v8::internal::Assembler::kInstrSize; 2456 padding_size -= v8::internal::Assembler::kInstrSize;
2467 } 2457 }
2468 } 2458 }
2469 } 2459 }
2470 2460
2471 #undef __ 2461 #undef __
2472 2462
2473 } // namespace compiler 2463 } // namespace compiler
2474 } // namespace internal 2464 } // namespace internal
2475 } // namespace v8 2465 } // namespace v8
OLDNEW
« no previous file with comments | « src/compiler/mips/instruction-selector-mips.cc ('k') | src/compiler/mips64/instruction-codes-mips64.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698