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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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40 V(MipsSarPair) \ | 40 V(MipsSarPair) \ |
41 V(MipsExt) \ | 41 V(MipsExt) \ |
42 V(MipsIns) \ | 42 V(MipsIns) \ |
43 V(MipsRor) \ | 43 V(MipsRor) \ |
44 V(MipsMov) \ | 44 V(MipsMov) \ |
45 V(MipsTst) \ | 45 V(MipsTst) \ |
46 V(MipsCmp) \ | 46 V(MipsCmp) \ |
47 V(MipsCmpS) \ | 47 V(MipsCmpS) \ |
48 V(MipsAddS) \ | 48 V(MipsAddS) \ |
49 V(MipsSubS) \ | 49 V(MipsSubS) \ |
50 V(MipsSubPreserveNanS) \ | |
51 V(MipsMulS) \ | 50 V(MipsMulS) \ |
52 V(MipsDivS) \ | 51 V(MipsDivS) \ |
53 V(MipsModS) \ | 52 V(MipsModS) \ |
54 V(MipsAbsS) \ | 53 V(MipsAbsS) \ |
55 V(MipsSqrtS) \ | 54 V(MipsSqrtS) \ |
56 V(MipsMaxS) \ | 55 V(MipsMaxS) \ |
57 V(MipsMinS) \ | 56 V(MipsMinS) \ |
58 V(MipsCmpD) \ | 57 V(MipsCmpD) \ |
59 V(MipsAddD) \ | 58 V(MipsAddD) \ |
60 V(MipsSubD) \ | 59 V(MipsSubD) \ |
61 V(MipsSubPreserveNanD) \ | |
62 V(MipsMulD) \ | 60 V(MipsMulD) \ |
63 V(MipsDivD) \ | 61 V(MipsDivD) \ |
64 V(MipsModD) \ | 62 V(MipsModD) \ |
65 V(MipsAbsD) \ | 63 V(MipsAbsD) \ |
66 V(MipsSqrtD) \ | 64 V(MipsSqrtD) \ |
67 V(MipsMaxD) \ | 65 V(MipsMaxD) \ |
68 V(MipsMinD) \ | 66 V(MipsMinD) \ |
69 V(MipsNegS) \ | 67 V(MipsNegS) \ |
70 V(MipsNegD) \ | 68 V(MipsNegD) \ |
71 V(MipsAddPair) \ | 69 V(MipsAddPair) \ |
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144 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 142 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
145 V(MRI) /* [%r0 + K] */ \ | 143 V(MRI) /* [%r0 + K] */ \ |
146 V(MRR) /* [%r0 + %r1] */ | 144 V(MRR) /* [%r0 + %r1] */ |
147 | 145 |
148 | 146 |
149 } // namespace compiler | 147 } // namespace compiler |
150 } // namespace internal | 148 } // namespace internal |
151 } // namespace v8 | 149 } // namespace v8 |
152 | 150 |
153 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 151 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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