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Side by Side Diff: src/compiler/arm64/instruction-selector-arm64.cc

Issue 2220973002: [turbofan] Remove the FloatXXSubPreserveNan operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Reintroduce an optimization for arm. Created 4 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 #include "src/compiler/node-properties.h" 7 #include "src/compiler/node-properties.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 1722 matching lines...) Expand 10 before | Expand all | Expand 10 after
1733 1733
1734 void InstructionSelector::VisitFloat64Add(Node* node) { 1734 void InstructionSelector::VisitFloat64Add(Node* node) {
1735 VisitRRR(this, kArm64Float64Add, node); 1735 VisitRRR(this, kArm64Float64Add, node);
1736 } 1736 }
1737 1737
1738 1738
1739 void InstructionSelector::VisitFloat32Sub(Node* node) { 1739 void InstructionSelector::VisitFloat32Sub(Node* node) {
1740 VisitRRR(this, kArm64Float32Sub, node); 1740 VisitRRR(this, kArm64Float32Sub, node);
1741 } 1741 }
1742 1742
1743 void InstructionSelector::VisitFloat32SubPreserveNan(Node* node) {
1744 VisitRRR(this, kArm64Float32Sub, node);
1745 }
1746
1747 void InstructionSelector::VisitFloat64Sub(Node* node) { 1743 void InstructionSelector::VisitFloat64Sub(Node* node) {
1748 Arm64OperandGenerator g(this);
1749 Float64BinopMatcher m(node);
1750 if (m.left().IsMinusZero()) {
1751 if (m.right().IsFloat64RoundDown() &&
1752 CanCover(m.node(), m.right().node())) {
1753 if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub &&
1754 CanCover(m.right().node(), m.right().InputAt(0))) {
1755 Float64BinopMatcher mright0(m.right().InputAt(0));
1756 if (mright0.left().IsMinusZero()) {
1757 Emit(kArm64Float64RoundUp, g.DefineAsRegister(node),
1758 g.UseRegister(mright0.right().node()));
1759 return;
1760 }
1761 }
1762 }
1763 Emit(kArm64Float64Neg, g.DefineAsRegister(node),
1764 g.UseRegister(m.right().node()));
1765 return;
1766 }
1767 VisitRRR(this, kArm64Float64Sub, node); 1744 VisitRRR(this, kArm64Float64Sub, node);
1768 } 1745 }
1769 1746
1770 void InstructionSelector::VisitFloat64SubPreserveNan(Node* node) {
1771 VisitRRR(this, kArm64Float64Sub, node);
1772 }
1773
1774 void InstructionSelector::VisitFloat32Mul(Node* node) { 1747 void InstructionSelector::VisitFloat32Mul(Node* node) {
1775 VisitRRR(this, kArm64Float32Mul, node); 1748 VisitRRR(this, kArm64Float32Mul, node);
1776 } 1749 }
1777 1750
1778 1751
1779 void InstructionSelector::VisitFloat64Mul(Node* node) { 1752 void InstructionSelector::VisitFloat64Mul(Node* node) {
1780 VisitRRR(this, kArm64Float64Mul, node); 1753 VisitRRR(this, kArm64Float64Mul, node);
1781 } 1754 }
1782 1755
1783 1756
(...skipping 965 matching lines...) Expand 10 before | Expand all | Expand 10 after
2749 // static 2722 // static
2750 MachineOperatorBuilder::AlignmentRequirements 2723 MachineOperatorBuilder::AlignmentRequirements
2751 InstructionSelector::AlignmentRequirements() { 2724 InstructionSelector::AlignmentRequirements() {
2752 return MachineOperatorBuilder::AlignmentRequirements:: 2725 return MachineOperatorBuilder::AlignmentRequirements::
2753 FullUnalignedAccessSupport(); 2726 FullUnalignedAccessSupport();
2754 } 2727 }
2755 2728
2756 } // namespace compiler 2729 } // namespace compiler
2757 } // namespace internal 2730 } // namespace internal
2758 } // namespace v8 2731 } // namespace v8
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